neoflash
Advanced Member level 1
Hi,
I have a question on a design of 2nd Order Sigma-Delta ADC (switched cap). The schematic is attached on the message.
The question is that the signal transfer function should not be the same as Z-2 as stated in the text book.
The problem stems from the two integrators. Both of the integrators has a
TF = Z-1 / (1-Z-1), which contains a delay. Therefore it is different from standard model of 2nd order mod whose 1st stage integrator doesn't have delay (Z-1).
I'm confused with this since this design is taken from EE247 lecture notes of Berkley. Wish people could help me understand it.
I have a question on a design of 2nd Order Sigma-Delta ADC (switched cap). The schematic is attached on the message.
The question is that the signal transfer function should not be the same as Z-2 as stated in the text book.
The problem stems from the two integrators. Both of the integrators has a
TF = Z-1 / (1-Z-1), which contains a delay. Therefore it is different from standard model of 2nd order mod whose 1st stage integrator doesn't have delay (Z-1).
I'm confused with this since this design is taken from EE247 lecture notes of Berkley. Wish people could help me understand it.