Explanatin of concepts in floorplaning and power planing using ICC

Hi,

I am newly learning pd using synopsys ICC flow, pls help me in understanding more about following questions

While doing the block level floor plan,

1 How we decide the size and shape of the block.which factors we have to consider to decide the size and shape of the block

2 reading the IO constraints using the "read_io_constraints<tdf file>", which factors have to consider for initial location of pin constraints,like by side, order, offset

3 i may use "creat_fp_placement" command to place and macros and std cells and then pin assignmets, here how can i assure macros and std cells are placed properly

i have ICC user guide, but do not have document which explains about the concepts.

if any body have docs explains concepts in floorplaing and power planing, pls send to me

icc synopsys

hai friend,
1) Size of the block is decided by the tool itself when u load the netlist and libraries, it will have internal algorithm to calculate the area of the core area according to the netlist and physical area of all cells in the netlist....
when it comes to Shape, usually v use rectangular or square depending on the die where it is going to be sit.... If it is a block level project, size and shape is given by the top level person....

2) sorry am not clear with the second question .....

3) there will be another command in the tool itself, After placement just use that command which reports u whether all the cells are placed or not...i mean to say is how many cells r placed and how many cells are not placed and how many overlap, etc....,

To do the work, v also need to have commands file which briefly explains u each and every command.....it will be great helpful.....

Thanku......

synopsys icc user guide

Thanks raki

Regarding 2nd question i may not be able explain better way, but let me put here sequence of commands that i use to do block level floor plan

# read verilognetlist
1)read_verilog
# pin constraints
2)read_io_constraints<tdffile>
# timing constraints
3)read_sdc
# create block shape, size, and placement rows
4)initialize_floorplan

# choose placement strategy(ies)
5)set_fp_placement_strategy…
create_fp_placement

# PNS/PNA to create and analyze power network 6)set_fp_rail_constraint/synthesize_fp_rail
commit_fp_rail

# assign and optimize block pins
7)set_fp_pin_constraints–block_level
place_fp_pins–block_level

# fix gross timing problems
8)optimize_fp_timing


my 2nd question is all about 2 command in the above script, how to choose those io constraints

here i am adding more words about 3rd question, its all about 5th command in the above script,
to optimize the block pin locations we place all std cells and macros and then optimize pin locations based on the std cell and macro locations,connectivity to pins.

If somebody have document on entire place and route concepts, pls upload here

Thanks in advance

create_fp_placement

"To optimize the block pin locations we place all std cells and macros and then optimize pin locations based on the std cell and macro locations,connectivity to pins."

Can u tell me y we need to optimize the block pin locations ???

firstly for the block level project the pin locations and size n shape of the block are given by the top level person....v shd not optimize pin locations of the block untill n unless specified......... Thanku

synopsys icc flow

Thanks raki31.

It means, pin locations are depends on the other hierarchical blocks, not on the std cells/macros placement of the block that we do floorplan

pin placement optimize

now u caught my point....
Internally u need to place macros according to block connectivity with minimum length of nets and to minimize routing congestion....
Thanku....

minimize floor plan area

Thanks raki123

Added after 10 minutes:

Raki31

In case of power planing for a block,how we decide the width of power rings(metal widths for vdd,vss) and straps and how to calculate how many vertical/horizontal straps are needed for a block.

If you have any document on this can u upload

Thanks in advance