how can i run pt after dft

i insert scanchains into the net dc wrote out,

but when i run pt,there are violations on sdff which is dff in dc netlist,

how can i set to change this?

you should modify the rule to adapt it!

ljxpjpjljx said:

you should modify the rule to adapt it!

Click to expand...

which rule do u mean?
thx 4 ur answer.

HolySaint said:

i insert scanchains into the net dc wrote out,

but when i run pt,there are violations on sdff which is dff in dc netlist,

how can i set to change this?

Click to expand...

Did you constrain the scan enable and other test mode pins in PT?. R u checking the timing in scan mode?. use set_case_analysis scan_en command

Yeah, you need analysis which candidate cause these violations. And maybe you should do DFT mode STA.

santhosh007 said:

HolySaint said:

i insert scanchains into the net dc wrote out,

but when i run pt,there are violations on sdff which is dff in dc netlist,

how can i set to change this?

Click to expand...

Did you constrain the scan enable and other test mode pins in PT?. R u checking the timing in scan mode?. use set_case_analysis scan_en command

Click to expand...

thQ
i set case analysis
and the violation reduce a lot

Hello Friend,

When u insert the DFT for a design, Design will have 2 modes. One is Functional Mode and second one is Test mode.

Now, question urself first on which mode u want to perform STA?

If STA is on Functional mode, just disable the Test mode by setting the case analysis on the respective test pins(scan_enable, scan_mode pins) which enable/disables the Testing.

Sunil Budumuru

thank u sunilbudumuru
u tell me so carefully

If STA is on Functional mode, just disable the Test mode by setting the case analysis on the respective test pins(scan_enable, scan_mode pins) which enable/disables the Testing.


i do it as u told me
but there are more violation as i analysis dc netlist (i use pt)

why ?

HolySaint said:

If STA is on Functional mode, just disable the Test mode by setting the case analysis on the respective test pins(scan_enable, scan_mode pins) which enable/disables the Testing.


i do it as u told me
but there are more violation as i analysis dc netlist (i use pt)

why ?

Click to expand...

What are those violations? Can you give a couple of examples?

WayneF said:

HolySaint said:

If STA is on Functional mode, just disable the Test mode by setting the case analysis on the respective test pins(scan_enable, scan_mode pins) which enable/disables the Testing.


i do it as u told me
but there are more violation as i analysis dc netlist (i use pt)

why ?

Click to expand...

What are those violations? Can you give a couple of examples?

Click to expand...

Startpoint: e1446_reg_2_
(rising edge-triggered flip-flop clocked by clk8)
Endpoint: twnc_core/down_top/down_core/dagc/err2out_read_tmp_reg_43_
(rising edge-triggered flip-flop clocked by clk8)
Path Group: clk8
Path Type: max

Point Incr Path
------------------------------------------------------------------------------
clock clk8 (rise edge) 0.00 0.00
clock network delay (ideal) 0.00 0.00
e1446_reg_2_/CK (SDFFRHQX1)
0.00 0.00 r
e1446_reg_2_/Q (SDFFRHQX1)
0.26 0.26 r
U193579/Y (INVX1) 0.13 0.38 f
U252239/Y (INVX1) 0.18 0.56 r
U252238/Y (INVX1) 0.24 0.80 f
U197310/Y (INVXL) 0.74 1.54 r
U196532/Y (INVX1) 0.31 1.85 f
U306728/Y (OAI21XL) 0.18 2.04 r
U306727/Y (OAI21XL) 0.17 2.20 f
U196286/Y (OAI2BB1X1) 0.18 2.38 f
U306556/Y (OAI21XL) 0.10 2.48 r
U196287/Y (INVX1) 0.12 2.60 f
U196290/Y (OAI2BB1X1) 0.14 2.73 f
U306548/Y (OAI21XL) 0.10 2.83 r
U196291/Y (INVX1) 0.12 2.95 f
U196275/Y (OAI2BB1X1) 0.14 3.09 f
U306557/Y (OAI21XL) 0.10 3.19 r
U196276/Y (INVX1) 0.12 3.31 f
U196292/Y (OAI2BB1X1) 0.14 3.44 f
U306549/Y (OAI21XL) 0.11 3.56 r
U193304/Y (INVX2) 0.08 3.64 f
U193542/Y (OAI2BB1X1) 0.13 3.76 f
U193541/Y (OAI21XL) 0.10 3.86 r
U196279/Y (INVX1) 0.12 3.98 f
U196288/Y (OAI2BB1X1) 0.14 4.12 f
U306550/Y (OAI21XL) 0.10 4.22 r
U196289/Y (INVX1) 0.12 4.34 f
U196277/Y (OAI2BB1X1) 0.14 4.48 f
U306558/Y (OAI21XL) 0.10 4.58 r
U196278/Y (INVX1) 0.12 4.70 f
U196269/Y (OAI2BB1X1) 0.14 4.83 f
U306551/Y (OAI21XL) 0.10 4.93 r
U196270/Y (INVX1) 0.12 5.05 f
U196280/Y (OAI2BB1X1) 0.14 5.19 f
U306559/Y (OAI21XL) 0.10 5.29 r
U196281/Y (INVX1) 0.12 5.41 f
U196271/Y (OAI2BB1X1) 0.14 5.54 f
U306552/Y (OAI21XL) 0.10 5.64 r
U196272/Y (INVX1) 0.12 5.77 f
U196282/Y (OAI2BB1X1) 0.14 5.90 f
U306560/Y (OAI21XL) 0.10 6.00 r
U196283/Y (INVX1) 0.12 6.12 f
U196273/Y (OAI2BB1X1) 0.14 6.26 f
U306553/Y (OAI21XL) 0.10 6.36 r
U196274/Y (INVX1) 0.12 6.48 f
U196284/Y (OAI2BB1X1) 0.14 6.62 f
U306561/Y (OAI21XL) 0.10 6.72 r
U196285/Y (INVX1) 0.12 6.84 f
U196293/Y (OAI2BB1X1) 0.14 6.97 f
U306554/Y (OAI21XL) 0.10 7.07 r
U196294/Y (INVX1) 0.12 7.19 f
U306564/Y (OAI2BB1X1) 0.14 7.33 f
U306563/Y (OAI21XL) 0.10 7.43 r
U306562/Y (INVX1) 0.13 7.56 f
U193263/Y (OAI2BB1X4) 0.10 7.66 f
U306555/Y (OAI21XL) 0.09 7.75 r
U194190/Y (INVX1) 0.14 7.88 f
U193818/Y (OAI2BB1X2) 0.12 8.01 f
U193817/Y (OAI21X2) 0.08 8.09 r
U196724/Y (INVX1) 0.09 8.17 f
U193258/Y (OAI2BB1X2) 0.10 8.28 f
U193427/Y (NAND2X1) 0.17 8.44 r
U194158/Y (AOI2BB1X1) 0.15 8.59 r
U194157/Y (NOR2X1) 0.12 8.71 f
U196306/Y (OAI2BB1X1) 0.17 8.88 f
U196486/Y (NAND2X4) 0.08 8.96 r
U193883/Y (INVX1) 0.13 9.10 f
U193266/Y (OAI21X4) 0.15 9.24 r
U193265/Y (CLKINVX8) 0.05 9.29 f
U193457/Y (OR2X2) 0.10 9.39 f
U193456/Y (NAND2X1) 0.20 9.59 r
U194179/Y (OAI21XL) 0.11 9.70 f
U193257/Y (NAND2X2) 0.14 9.84 r
U194180/Y (INVX1) 0.15 9.99 f
U193269/Y (OAI21X4) 0.16 10.15 r
U193267/Y (CLKINVX8) 0.05 10.20 f
U196235/Y (OR2X4) 0.10 10.30 f
U196236/Y (NAND2X4) 0.07 10.38 r
U193882/Y (INVX1) 0.14 10.51 f
U193277/Y (OAI21X4) 0.16 10.67 r
U193275/Y (OAI21X4) 0.04 10.71 f
U193276/Y (OAI2BB1X4) 0.08 10.79 r
U196328/Y (INVX1) 0.11 10.90 f
U196338/Y (OR2X4) 0.12 11.03 f
U193816/Y (NAND2X4) 0.07 11.10 r
U193468/Y (OAI21XL) 0.08 11.18 f
U193467/Y (NAND2X1) 0.28 11.46 r
U193300/Y (OAI21X1) 0.11 11.56 f
U196488/Y (NAND2X4) 0.14 11.70 r
U193261/Y (CLKINVX2) 0.14 11.84 f
U193272/Y (OAI21X4) 0.14 11.98 r
U193270/Y (OAI21X2) 0.07 12.05 f
U199798/Y (OAI21X4) 0.10 12.15 r
U196451/Y (INVX1) 0.12 12.27 f
U194292/Y (NOR2X1) 0.11 12.39 r
U193543/Y (OR2X2) 0.16 12.54 r
U193546/Y (OAI21XL) 0.09 12.63 f
U193544/Y (NAND2X1) 0.23 12.85 r
U193547/Y (INVX1) 0.13 12.98 f
U196954/Y (OR2X2) 0.13 13.11 f
U194293/Y (NAND2X1) 0.16 13.27 r
U196221/Y (INVX1) 0.14 13.41 f
U196723/Y (OAI21X2) 0.19 13.60 r
U306326/Y (OAI21XL) 0.13 13.74 f
U193278/Y (OAI21X4) 0.14 13.87 r
U193821/Y (OAI21X4) 0.04 13.92 f
U193820/Y (OAI2BB1X4) 0.10 14.01 r
U306353/Y (OAI21XL) 0.10 14.11 f
U196212/Y (NAND2X2) 0.12 14.23 r
U196198/Y (INVX1) 0.09 14.32 f
U306412/Y (XNOR2X1) 0.12 14.44 f
U306411/Y (OAI21XL) 0.14 14.58 r
U306410/Y (OAI21XL) 0.08 14.66 f
err2out_read_tmp_reg_43_/D (SDFFRXL)
0.00 14.66 f
data arrival time 14.66

clock clk8 (rise edge) 15.00 15.00
clock network delay (ideal) 0.00 15.00
clock uncertainty -0.20 14.80
err2out_read_tmp_reg_43_/CK (SDFFRXL)
14.80 r
library setup time -0.16 14.64
data required time 14.64
------------------------------------------------------------------------------
data required time 14.64
data arrival time -14.66
------------------------------------------------------------------------------
slack (VIOLATED) -0.02


in dc netlist, the timing can meet
when dff-->sdff,the timing is becoming tighten
but should i inprove my timing in dc scripts?

Hi Friend,

Sorry for the late reply.

Points to note:
1. Instead of giving the choice to the DFT tool to select the corresponding SCAN flop, you manually select (by giving in script) "set_scan_replacement".
Here, intelligent selection of the scan flops is more important. This way you can get best timing clouser.
See the timing characterstics of SDFFRHQX1? Check the normal flop that was there earlier and replace with corresponding SCAN flop instad of SDFFRHQX1 scan flop.
I guess U've got what I m trying to say.

2. Still, problems, let me know.. we'll add another solution.

-Sunil Budumuru

Thanks for all the person that helped me.
U help me to solve the problem.