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FFT is a very expensive operation in terms of MAC/s: if you require FFT calculation to achieve very good spectral resolution (e.g. many points) with a high sample rate data stream the MAC/s requirement could not be matched by even the most powerful DSP so a possible solution is to use dedicated hardware (or FPGA) as a co-processor to perform efficient FFT computation at high data rate, while the DSP or GPP could perform the less intensive parts of the processing.
I suppose that the first consideration that a system engineer shall do when thinking to use a FFT co-processor to reduce computational load of a DSP is about cost of this solution: is it really cheaper having 2 separate devices (DSP + FFT processor) or is it more convenient developing all the project using a more expensive but more powerful single device (1 faster DSP or 1 complex FPGA/ASIC)?
After this consideration the engineer shall evaluate the partitioning of the system functionalities between the devices, considering that probably in this situation he has tight requirements on real time processing due to high I/O data rates.
Hope this could help you as a starting point.
With a DSP and a GPP (ARM) probably the partitioning of a communication system could be as follows
DSP to implement the PHY and MAC layers
GPP to implement the upper layers
but this is not a rule of thumb.
The FEC (forward error correction) could be performed by DSP at PHY layer.
In any case the partitioning of the system depends from the application.
>> I am just trying to understand the current technology ....
Hard work! Considering how fast the progress in the digital world goes on probably when you will start mastering completely a technology you will realize that the world has changed .
I suggest you to take a look at the manufacturers' web sites (Texas Instruments, Freescale and Analog Devices for DSP and Xilinx or Altera for FPGA): you will find lot of Application notes with examples of systems, mostly in the cellular market.
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