vinun_7
Junior Member level 2
My question is related to verification.
If u r running a simulation (module level or full chip) and u have already made sure that
- clk/reset and other connectivities are okay
- the chip has booted properly
But the simulation hangs.
- Ur simulation time is not proceeding only delta is proceeding.
What could have gone wrong? What can be the things we can look for debugging...?
If u r running a simulation (module level or full chip) and u have already made sure that
- clk/reset and other connectivities are okay
- the chip has booted properly
But the simulation hangs.
- Ur simulation time is not proceeding only delta is proceeding.
What could have gone wrong? What can be the things we can look for debugging...?