Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

when serial rs232 speed is not enough????

Status
Not open for further replies.

priestnot

Member level 5
Member level 5
Joined
May 1, 2006
Messages
89
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
2,098
rs232 speed

Ok here is my problem:

I have to sample 8 digital signal (H=5V L=0V) at a minimum speed of 80MHZ.
I am using a high speed micro controller (C8051F131 from Silicon Laboratories) with a ≈100MHz or ≈80MHzcrystal.

The signals that i want to sample are connected to one of the 8 bit ports of the controller.

So far so good...
The problem is that i need to send those values to a host PC in order to process them.

What i need to know is what is the maximum speed (baud rate) of a serial port?
Can i send 8bits at a frequency of ≈100MHz or ≈80MHz?

I think that it will be impossible.
So what are my solutions?

Using a USB2.0 Micro controller? But then i have to make the drivers for the PC and i don't know how to do that, is there any tutorials for that?

Another solution is using a serial to USB converter like the ftdi or texas. But i think that the speed limitation is the same as a normal serial port.

The final solution is to use some kind of buffering system.
If the speed of sampling is greater then the serial port speed its possible to fill up the buffer memory what can i do to resolve this problem?
Is there any external memory that accepts read and wright at the same time? And has 2 serial ports one for read and one for wright?
Can i use the internal data memory to do the buffering?
If the speed of sampling is greater then the serial port speed its possible to fill up the buffer memory what can i do to resolve this problem?

Is there any other solution?
If you have any ideas or comment to my solutions please do tell...
 

serial rs232 speeds

Your (up to) 100MIPs C8051F131 won't be able to pass the data fast enough anyway. You can't process a 100MHz signal with a 100MIPs part unless the program is one instruction long.
 

    priestnot

    Points: 2
    Helpful Answer Positive Rating
yes i know that that. thats why i pointed to 80MHz.

But still i was hoping for a solution for my problem...

Added after 30 minutes:

Ups i have made some calcs and i guess its not enough.

If the C8051F131 is working with a 100MHz crystal, and it has the same Machine cycles that a 80c51, with a code like this:

LOOP:
MOV @PTR, #P1; moves to the pointer position in data mem/ 2 Machine Cycles
INC PTR; incrementes the pointer to data mem/ 1Machine Cycles
SJMP LOOP; returns to LOOP/ 2 Machine Cycles

witch adds like this: (MC=Machine Cycle)
At a f=100MHz => t(1MC)=1/100MHz=10ns

so we have:

LOOP:
MOV @PTR, #P1; 2 Machine Cycles = 20ns
INC PTR; 1Machine Cycles = 10ns
SJMP LOOP; 2 Machine Cycles = 20ns

t(5MC)=20ns+10ns+20ns=50ns => f(loop)= 1/50ns= 20MHz

hum is there any solution to rise the frequency of sampling????
and by if you have any solutions for the first question what to do when serial port speed isn't enough.
 

You seem to be forgetting that a PC cannot read data at that pace on its serial and USB ports...

What is the purpose of your design?
 

As said, the data can be neither acquired by a 100 MHz µP nor processed by a PC at the intended speed. The required throughput is about 4 orders of magnitude above a usual RS232, so the question title is a nice understatement.

Acquiring and preprocessing of data has to be performed by dedicated hardware respectively programmable logic, e. g. a FPGA. But you should have a plausible idea where to place the processed data before starting a design.
 

ok the project is to make a logical analyzer.
As i sayd before i alredy know that RS232 isnt fast enough.

so what are my chances?

use some kind of buffer? use a USB microcontroler?
its sopouse to be a cheap hardware.


for example if you see tha project bitsope it has a pic for sampling. so how they did it?
**broken link removed**
 

It seems to me, that you didn't understand yet what the bottlenecks of a logic analyzer are. For the project, it's pretty necessary to understand it!

Let me mention a few keywords first:
1. Clocking
2. Triggering
3. Data storage

1. Most logic analyzers have an option to use an external clock from the application alternatively to an internal clock. It's necessary if you want to acquire a signal, that is e. g. faster than 1/10 of your logic analyzer maximum sampling rate. It may be omitted, if the LA is intended for asynchronous or slow applications only,

2. A suitable triggering logic is necessary in most cases to detect events from the bitstreams presented to the LA and start or stop acquisition. It has to operate in real-time at sampling speed usually.

3. The most important point is the data path. You have to establish a data storage of sufficient capacity that can write data continously at the intended sampling rate. It's effectively impossible to store a data stream of 100 MByte/s at a PC that runs a standard OS, even if the interface would be fast enough (Gigabit Ethernet or PCI Express have a troughput in this region). And 100 MByte/s isn't enough for a fast LA. Thus a dedicated local data storage is needed.

As a result, a FPGA, probably supplemented by fast external memory, is a appropriate design platform for a low cost LA. Cause data transmission to the controlling PC is freed from real-time requirements, it may use any avalable channel, even RS232. But a faster interface (USB, Ethernet) is preferable, although it needs additional hardware and supporting logic.

An USB microprocessor with a fast data interface, e. g. a Cypress FX2 could act as control and data channel and also perform the FPGA configuration.
 

You should see the Oscillscope on www.fpga4fun.com.
They are basically the same hardware.They sample the data at 100MSPS and send it to PC at 115.2Kbps.Also I think there is a Logic Analyzer Core at www.opencores.org.The FPGA does not need external memory and if need be you have to make a standalone unit you can use a SoftCore so try the FPGA.I suggest the Spartan 3AN from Xilinx as it is nonvolatile and very fast.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top