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Some questions about ADC design, please?

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gaom9

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Hi, I have some questions about ADC design, please.
1. What does the parameter of Msample/s in ADC or DAC design maen, please? For example, 70 Msample/s.
What determine this parameter? Is there any relation between it and the sample clock?
2. How to determine the bandwidth of the amp in the ADC to fit the signal bandwidth, please?
For example, when the signal bandwidth is 100MHz, what large bandwidth does it need? And also what is the bandwidth relation between it and the sample clock?

Thank you.
Best regards!
 

*sniff* *sniff*

Smells like molding home work to me :D

Msamples/s = Million Samples per Second - it is a 'speed' rating.
If I am sampling 70 Msamples/s;
1/ 70,000,000 = 1.42 x 10-8 time between samples.
--------------------
Other Q's... look here:
https://zone.ni.com/devzone/cda/tut/p/id/2709
 

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    gaom9

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Thank you, Maddogg6.
I have read the link.
But I still don't understand it quite clearly. The sample rate is based on the sample clock. Do they equal to each other, please?
Does 70 Msample/s mean the sample clock is 70MHz, please?

Thank you!
Best regards!
 

Yes.. 70MS/s means the sample clock is running at 70MHz..

Also the input bandwidth of the ADC means the maximum frequency of input which the ADC can sample with accuracy less than 1/2 LSB.

This bandwidth may or may not be equal to your 1/2*sampling rate... But this bandwidth should always be greater than half the ADC sampling rate.
 

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    gaom9

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Thank you very much, fredflinstone.


Best regards!
 

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