Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
You just need to bias for the core of bandgap then using either Vbg compare with a VT or the current which generate by delta Vbe/R compare with an other current to finish start up. Thus either Vbg>VT or delta Vbe>I then you can release start up circuit.
Best
It may be more safe and easier to use a follower to pull the BG to make sure it will not stay at the unwanted stable point (VBG=0V). By comparing the VBG with a threshold can sometimes have a problem when e.g. the threshold voltage varies and is larger in some conditions. The startup circuit will pull up the BG voltage all the time.
Even it can work properly, there will be a jump/overshoot at the VBG during startup.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
