digital pick calcultion

dmk · Apr 13, 2008

Yes, this is much clear, except that you cannot make reset=1 from inside the code - reset is input and you can only read it. That is why I included the output signal steady - it goes to 1 when the input value is lower than pick value several times and stops the circuit. Now, if you make reset=1 and 0 the circuit will start again (you can connect reset and steady outside the chip).

shadeslayer · Apr 13, 2008

thn i need to implement that if the my input is below ref value for 2 min then my system will stop ,,, how can i do that ,,, ??

i m planing to burn it on spaten3 dsp trainer kit ,,, but i m not geting tht how can i interface onboard adc and dac as well as how can i siplay my output on the lcd display of board ,, if my simulations work well thn i will try to do tht ,,,

and u said tht i can only read the reset as it in input ,, so if i get some signat at output so make reset one then i can use external circuit to make reset 1 ,,, this can b done ,, ryt??

dmk · Apr 13, 2008

Well, here is the final code, circuit, simulation, and the whole project.

shadeslayer · Apr 13, 2008

can u give me little explanation ,,,, so that i an come to know in detail ,,,

Added after 2 minutes:

in the file u typed in 3 parts ,,, and u said the 3rd parts in circuit based design ,,

what shuld i use ,, and i asked about burning it on sparten3 dsp tariner kit ,, please read my last posts ,, so u can come to know , ,

thx for helping

dmk · Apr 13, 2008

You must use the all three parts - first and second parts are the components, they must be connected together to form the whole device - namely the third part (it is a structural description).
I don't have a dsp kit (and do not know it), so I cannot help you with it.
First you must unzip the project file and open it with ISE (project.ise). Inside it you need to open the file pick_top.vhd - this is the structural description, i.e. the whole device.
If you want to simulate it you must start simulation of tb_pick_top(tb_pick_top_tbw). You should receive the picture I sent you.
To burn the dsp kit you must read its explanation and understand how to use it (I am sure there is some .pdf with it that will help you).
Regards

Added after 5 minutes:

By the way, I didn't try implementation and it is not alway possible to synthesize and implement the VHDL code. In such case it is quite possible to be necessary that some changes in the code must be done.

Added after 10 minutes:

Well, I synthesized and implemeted it and did post PAR simulation as well - it looks like the code is OK, but you must precisely check it alone, too.

shadeslayer · Apr 13, 2008

i didnt got ur last point ,, what u want to say ??

i will see that if i can burn it on kit and abel to join it with onboard adc and dac ,,,

btw thx a lot for help ,,, i will try to do further modification if i can do in that ,, i have to look for further addition in the signal like to calculate averag value and also to display it on the lcd screen as well asi have to look for reset signal modification ,, i will try that ,, nvr mind ,,,

thx again

dmk · Apr 13, 2008

The first step is entering the code, the second - simulating to see if you algorithm is correct, the third - to synthesize it (convert to RTL primitives), the fourth - implementation (place and route in the chosen chip - in your case - Xilinx FPGAs).
After that you can do (as an option) post place and route simulation - it includes the static delays from the chip into the model of your device and uses them in simulation, so the simulation should be more "realistic".
By the way, you must realize what is the clock ffrequency of DSP board (it is probably 50MHz or higher) and decide how long should be the devider (the generic t_per in U1: tmr) and change its value to receive some period close to 2 or 3 minutes. Say, if the clock is 50MHz, than the clock period is 40ns and if you put t_per=>2147483647, the device will wait for 2147483647*40ns= 85,9sec. The value 2147... is the maximum for the integer in VHDL. If this is not enough you can change the generic to STD_LOGIC_VECTOR (31 downto 0), which will give about 170 sec.

Added after 5 minutes:

How to convert a HEX-to-7-segment you can see from Edit->Language Templates->VHDL->Synthesis constructs->Coding Examples->Misc->7-Segment Display Hex Conversion.
Good luck!

shadeslayer · Apr 14, 2008

thank you ,,, i will see for that ,,,

Added after 3 minutes:

hee is the kit which i m using ,,, it is having 4MHz clock

https://www.mte-india.com/ProductinfoNew.aspx?ProductId=141&CategoryId=1

dmk · Apr 14, 2008

With 4MHz (250ns) clock you can hold 125 sec. period in integer number 5E8, so it should be OK.

Added after 1 minutes:

The board looks pretty good

shadeslayer · Apr 14, 2008

yeh it looks good ,, but i have to work on it that how can i use onboard adc dac as well as display to display my output ,, i seen lab manula but its not properly writen so i m confused in it

dmk · Apr 14, 2008

I suggest you to open and read very carefully the ise9Tut.pdf - you can download it from the xilinx site. It contains many helpful things, including synthesis, implementation, and download on a kit board (not DSP, but any way - it is Spartan 3 board).

shadeslayer · Apr 14, 2008

i kknw that things ,,,

but i dnt knw how can i use my onboard lcd dispaly ,,, i seen labmanual but it is not clear over thr ,,i got code fot that also ,, but its way complecated for me to understand what is haping in tht ,,

Added after 2 minutes:

here is the code

Code:

#!/bin/sh 
# This is a shell archive (produced by GNU sharutils 4.6.3). 
# To extract the files from this archive, save it to some FILE, remove 
# everything before the `#!/bin/sh' line above, then type `sh FILE'. 
# 
lock_dir=_sh08436 
# Made on 2007-12-31 16:41 CET by <xl@wzab>. 
# Source directory was `/tmp/stack_fsm'. 
# 
# Existing files will *not* be overwritten, unless `-c' is specified. 
# 
# This shar contains: 
# length mode       name 
# ------ ---------- ------------------------------------------ 
#   9450 -rw-r--r-- lcd_ram.vhd 
#   9307 -rw-r--r-- lcd_regs.vhd 
#   3079 -rw-r--r-- lcd_test_tb.vhd 
#   1242 -rw-r--r-- lcd_test.ucf 
#    368 -rwxrw-r-- test.sh 
# 
MD5SUM=${MD5SUM-md5sum} 
f=`${MD5SUM} --version | egrep '^md5sum .*(core|text)utils'` 
test -n "${f}" && md5check=true || md5check=false 
${md5check} || \ 
  echo 'Note: not verifying md5sums.  Consider installing GNU coreutils.' 
save_IFS="${IFS}" 
IFS="${IFS}:" 
gettext_dir=FAILED 
locale_dir=FAILED 
first_param="$1" 
for dir in $PATH 
do 
  if test "$gettext_dir" = FAILED && test -f $dir/gettext \ 
     && ($dir/gettext --version >/dev/null 2>&1) 
  then 
    case `$dir/gettext --version 2>&1 | sed 1q` in 
      *GNU*) gettext_dir=$dir ;; 
    esac 
  fi 
  if test "$locale_dir" = FAILED && test -f $dir/shar \ 
     && ($dir/shar --print-text-domain-dir >/dev/null 2>&1) 
  then 
    locale_dir=`$dir/shar --print-text-domain-dir` 
  fi 
done 
IFS="$save_IFS" 
if test "$locale_dir" = FAILED || test "$gettext_dir" = FAILED 
then 
  echo=echo 
else 
  TEXTDOMAINDIR=$locale_dir 
  export TEXTDOMAINDIR 
  TEXTDOMAIN=sharutils 
  export TEXTDOMAIN 
  echo="$gettext_dir/gettext -s" 
fi 
if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null 
then if (echo -n test; echo 1,2,3) | grep n >/dev/null 
     then shar_n= shar_c=' 
' 
     else shar_n=-n shar_c= ; fi 
else shar_n= shar_c='\c' ; fi 
f=shar-touch.$$ 
st1=200112312359.59 
st2=123123592001.59 
st2tr=123123592001.5 # old SysV 14-char limit 
st3=1231235901 
if touch -am -t ${st1} ${f} >/dev/null 2>&1 && \ 
   test ! -f ${st1} && test -f ${f}; then 
  shar_touch='touch -am -t $1$2$3$4$5$6.$7 "$8"' 
elif touch -am ${st2} ${f} >/dev/null 2>&1 && \ 
   test ! -f ${st2} && test ! -f ${st2tr} && test -f ${f}; then 
  shar_touch='touch -am $3$4$5$6$1$2.$7 "$8"' 
elif touch -am ${st3} ${f} >/dev/null 2>&1 && \ 
   test ! -f ${st3} && test -f ${f}; then 
  shar_touch='touch -am $3$4$5$6$2 "$8"' 
else 
  shar_touch=: 
  echo 
  ${echo} 'WARNING: not restoring timestamps.  Consider getting and' 
  ${echo} 'installing GNU `touch'\'', distributed in GNU coreutils...' 
  echo 
fi 
rm -f ${st1} ${st2} ${st2tr} ${st3} ${f} 
# 
if test ! -d ${lock_dir} 
then : ; else ${echo} 'lock directory '${lock_dir}' exists' 
  exit 1 
fi 
if mkdir ${lock_dir} 
then ${echo} 'x - created lock directory `'${lock_dir}\''.' 
else ${echo} 'x - failed to create lock directory `'${lock_dir}\''.' 
  exit 1 
fi 
# ============= lcd_ram.vhd ============== 
if test -f 'lcd_ram.vhd' && test "$first_param" != -c; then 
  ${echo} 'x -SKIPPING lcd_ram.vhd (file already exists)' 
else 
${echo} 'x - extracting lcd_ram.vhd (text)' 
  sed 's/^X//' << 'SHAR_EOF' > 'lcd_ram.vhd' && 
------------------------------------------------------------------------------- 
-- Title      : LCD controller for Spartan 3E Starter Kit 
-- Project    : 
------------------------------------------------------------------------------- 
-- File       : lcd.vhd 
-- Author     : Wojciech M. Zabolotny <w...@ise.pw.edu.pl> 
-- Company    : 
-- Created    : 2007-12-31 
-- Last update: 2007-12-31 
-- Platform   : 
-- Standard   : VHDL 
------------------------------------------------------------------------------- 
-- Description: This is a sample implementation of state machine 
-- with "state stack", which allows you to implement often used 
-- sequences of states as "subroutines" 
-- This is a slightly modified implementation - return requires 
-- one clock cycle more, but the stack may be automatically 
-- implemented in RAM 
------------------------------------------------------------------------------- 
-- Copyright (c) 2007 
-- This is public domain code!!! 
------------------------------------------------------------------------------- 
-- Revisions  : 
-- Date        Version  Author  Description 
-- 2007-12-31  1.0      wzab    Created 
------------------------------------------------------------------------------- 
X 
X 
library ieee; 
use ieee.std_logic_1164.all; 
use ieee.numeric_std.all; 
X 
entity lcd_test is 
X   
X  port ( 
X    led            : out std_logic_vector(7 downto 0); 
X    lcd            : out std_logic_vector(7 downto 4); 
X    lcd_rs         : out std_logic; 
X    lcd_rw         : out std_logic; 
X    lcd_e          : out std_logic; 
X    strataflash_oe : out std_logic; 
X    strataflash_we : out std_logic; 
X    strataflash_ce : out std_logic; 
X    sys_clk        : in  std_logic; 
X    sys_rst        : in  std_logic); 
X 
end lcd_test; 
X 
architecture beh of lcd_test is 
X 
X  constant T_CLK : integer := 20;       -- Clock period in ns 
X  type T_LCD_STATE is (L_START, L_WRITE, L_DELAY, L_RET, L_INIT0, 
X                       L_INIT1, L_INIT2, L_INIT3, L_INIT4, L_INIT5, L_INIT6, L_INIT7, 
X                       L_INIT8, L_INIT9, L_INIT10, L_INIT11, L_INIT12, L_INIT13, L_INIT14, L_INIT15, 
X                       L_INIT16, L_INIT17, L_INIT18, L_INIT19, L_INIT20, L_INIT21, L_INIT22, 
X                       L_WRITED, L_WRITED_1, L_WRITED_2, L_WRITED_3, L_WRITED_4, 
X                       L_WRITE4, L_WRITE4_1, L_WRITE4_2, L_WRITE4_3, 
X                       L_WRITE8, L_WRITE8_1, L_WRITE8_2); 
X  constant STACK_DEPTH : integer                        := 7; 
X  type T_STACK is array (STACK_DEPTH-1 downto 0) of T_LCD_STATE; 
X  signal stack         : T_STACK; 
X  signal stack_ptr     : integer range 0 to STACK_DEPTH := 0; 
X  signal stack_err     : boolean                        := false; 
X  signal lcd_state     : T_LCD_STATE                    := L_START; 
X  signal lcd_cmd       : std_logic_vector(7 downto 0); 
X  signal cnt_del       : integer                        := 0; 
X 
X  signal main_clk, main_rst, main_rst0 : std_logic := '0'; 
X   
begin  -- beh 
X 
X  strataflash_ce <= '0'; 
X  strataflash_we <= '1'; 
X  strataflash_oe <= '1'; 
X 
X  main_clk       <= sys_clk; 
X  led(7)         <= '1' when stack_err else '0'; 
X  process (main_clk, sys_rst) 
X  begin  -- process 
X    if sys_rst = '1' then               -- asynchronous reset (active low) 
X      main_rst  <= '0'; 
X      main_rst0 <= '0'; 
X    elsif main_clk'event and main_clk = '1' then  -- rising clock edge 
X      main_rst0 <= '1'; 
X      main_rst  <= main_rst0; 
X    end if; 
X  end process; 
X 
X  process (main_clk, sys_rst) 
X 
X    procedure STK_PUSH ( 
X      constant next_state : in T_LCD_STATE) is 
X    begin  -- STK_PUSH 
X      if stack_ptr < STACK_DEPTH then 
X        stack(stack_ptr) <= next_state; 
X        stack_ptr        <= stack_ptr + 1; 
X      else 
X        stack_err <= true; 
X      end if; 
X    end STK_PUSH; 
X 
X    procedure STK_RET is 
X    begin  -- stk_pop 
X      if stack_ptr > 0 then 
X        stack_ptr <= stack_ptr - 1; 
X        lcd_state <= L_RET; 
X      else 
X        stack_err <= true; 
X      end if; 
X    end STK_RET; 
X 
X    procedure STK_CALL ( 
X      constant called_state, ret_state : in T_LCD_STATE) is 
X    begin  -- STK_CALL 
X      STK_PUSH(ret_state); 
X      lcd_state <= called_state; 
X    end STK_CALL; 
X 
X    procedure STK_JMP ( 
X      constant called_state : in T_LCD_STATE) is 
X    begin  -- STK_CALL 
X      lcd_state <= called_state; 
X    end STK_JMP; 
X 
X    procedure STK_DEL ( 
X      constant delay     : in integer; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- stk_pop 
X      cnt_del <= (delay+T_CLK-1) / T_CLK; 
X      STK_CALL(L_DELAY, ret_state); 
X    end STK_DEL; 
X     
X    procedure STK_WRITE4 ( 
X      constant value4    : in integer range 0 to 15; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITE4 
X      lcd_rs              <= '0'; 
X      lcd_cmd(7 downto 4) <= std_logic_vector(to_unsigned(value4, 4)); 
X      STK_CALL(L_WRITE4, ret_state); 
X    end STK_WRITE4; 
X     
X    procedure STK_WRITE8 ( 
X      constant value8    : in integer range 0 to 255; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITE8 
X      lcd_rs              <= '0'; 
X      lcd_cmd(7 downto 0) <= std_logic_vector(to_unsigned(value8, 8)); 
X      STK_CALL(L_WRITE8, ret_state); 
X    end STK_WRITE8; 
X 
X    procedure STK_WRITED ( 
X      constant value8    : in integer range 0 to 255; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITED 
X      lcd_rs              <= '1'; 
X      lcd_cmd(7 downto 0) <= std_logic_vector(to_unsigned(value8, 8)); 
X      STK_CALL(L_WRITED, ret_state); 
X    end STK_WRITED; 
X 
X    procedure INIT is 
X    begin  -- INIT 
X      lcd_rw          <= '0'; 
X      lcd_e           <= '0'; 
X      lcd             <= (others => '0'); 
X      lcd_state       <= L_START; 
X      led(6 downto 0) <= (others => '0'); 
X      stack_err       <= false; 
X      stack_ptr       <= 0; 
X      cnt_del         <= 0; 
X    end INIT; 
X     
X  begin  -- process 
X    if sys_rst = '1' then               -- asynchronous reset (active low) 
X      INIT; 
X    elsif main_clk'event and main_clk = '1' then  -- rising clock edge 
X      if main_rst = '0' then 
X        INIT; 
X      else 
X        led(6 downto 4) <= std_logic_vector(to_unsigned(stack_ptr,3)); 
X        case lcd_state is 
X          when L_START => 
X            STK_DEL(16_000_000, L_INIT0); 
X            -- Subroutine DELAY 
X          when L_INIT0 => 
X            led(0) <= '1'; 
X            STK_WRITE4(16#3#, L_INIT1); 
X          when L_INIT1 => 
X            STK_DEL(4_200_000, L_INIT2); 
X          when L_INIT2 => 
X            STK_WRITE4(16#3#, L_INIT3); 
X          when L_INIT3 => 
X            STK_DEL(110_000, L_INIT4); 
X          when L_INIT4 => 
X            STK_WRITE4(16#3#, L_INIT5); 
X          when L_INIT5 => 
X            STK_DEL(41_000, L_INIT6); 
X          when L_INIT6 => 
X            STK_WRITE4(16#2#, L_INIT7); 
X          when L_INIT7 => 
X            STK_DEL(41_000, L_INIT8); 
X          when L_INIT8 => 
X            STK_WRITE8(16#28#, L_INIT9); 
X          when L_INIT9 => 
X            STK_DEL(41_000, L_INIT10); 
X          when L_INIT10 => 
X            STK_WRITE8(16#06#, L_INIT11); 
X          when L_INIT11 => 
X            STK_DEL(41_000, L_INIT12); 
X          when L_INIT12 => 
X            STK_WRITE8(16#0C#, L_INIT13); 
X          when L_INIT13 => 
X            STK_DEL(41_000, L_INIT14); 
X          when L_INIT14 => 
X            STK_WRITE8(16#01#, L_INIT15); 
X          when L_INIT15 => 
X            STK_DEL(1_750_000, L_INIT16); 
X          when L_INIT16 => 
X            STK_WRITED(16#45#, L_INIT17); 
X          when L_INIT17 => 
X            STK_WRITED(16#46#, L_INIT18); 
X          when L_INIT18 => 
X            STK_WRITED(16#47#, L_INIT19); 
X          when L_INIT19 => 
X            STK_WRITED(16#48#, L_INIT20); 
X          when L_INIT20 => 
X            STK_WRITED(16#49#, L_INIT21); 
X          when L_INIT21 => 
X            STK_DEL(2_000_000_000,L_INIT20);                       -- we stay here forever 
X          when L_DELAY => 
X            if cnt_del = 0 then 
X              STK_RET; 
X            else 
X              cnt_del <= cnt_del-1; 
X            end if; 
X            -- Subroutine WRITE4 
X          when L_WRITE4 => 
X            led(3)          <= '1'; 
X            lcd_rw          <= '0'; 
X            lcd(7 downto 4) <= lcd_cmd(7 downto 4); 
X            STK_DEL(60, L_WRITE4_1); 
X          when L_WRITE4_1 => 
X            lcd_e <= '1'; 
X            STK_DEL(250, L_WRITE4_2); 
X          when L_WRITE4_2 => 
X            lcd_e <= '0'; 
X            STK_DEL(20, L_WRITE4_3); 
X          when L_WRITE4_3 => 
X            led(3) <= '0'; 
X            STK_RET; 
X            -- Subroutine WRITE8 
X          when L_WRITE8 => 
X            led(2) <= '1'; 
X            STK_CALL(L_WRITE4, L_WRITE8_1); 
X          when L_WRITE8_1 => 
X            STK_DEL(1_000, L_WRITE8_2); 
X          when L_WRITE8_2 => 
X            lcd_cmd(7 downto 4) <= lcd_cmd(3 downto 0); 
X            led(2)              <= '0'; 
X            STK_JMP(L_WRITE4); 
X            -- Subroutine WRITED 
X          when L_WRITED => 
X            led(1) <= '1'; 
X            STK_CALL(L_WRITE4, L_WRITED_1); 
X          when L_WRITED_1 => 
X            STK_DEL(1_000, L_WRITED_2); 
X          when L_WRITED_2 => 
X            lcd_cmd(7 downto 4) <= lcd_cmd(3 downto 0); 
X            STK_CALL(L_WRITE4, L_WRITED_3); 
X          when L_WRITED_3 => 
X            STK_DEL(41_000, L_WRITED_4); 
X          when L_WRITED_4 => 
X            --lcd_rs <= '0'; 
X            led(1) <= '0'; 
X            STK_RET; 
X          when L_RET => 
X            lcd_state <= stack(stack_ptr); 
X          when others => 
X            STK_JMP(L_INIT0); 
X        end case; 
X      end if; 
X    end if; 
X  end process; 
end beh; 
SHAR_EOF 
  (set 20 07 12 31 16 37 47 'lcd_ram.vhd'; eval "$shar_touch") && 
  chmod 0644 'lcd_ram.vhd' 
if test $? -ne 0 
then ${echo} 'restore of lcd_ram.vhd failed' 
fi 
  if ${md5check} 
  then ( 
       ${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'lcd_ram.vhd: MD5 check failed' 
       ) << SHAR_EOF 
748c67b71f4dd43e9a3868200651f277  lcd_ram.vhd 
SHAR_EOF 
  else 
test `LC_ALL=C wc -c < 'lcd_ram.vhd'` -ne 9450 && \ 
  ${echo} 'restoration warning:  size of lcd_ram.vhd is not 9450' 
  fi 
fi 
# ============= lcd_regs.vhd ============== 
if test -f 'lcd_regs.vhd' && test "$first_param" != -c; then 
  ${echo} 'x -SKIPPING lcd_regs.vhd (file already exists)' 
else 
${echo} 'x - extracting lcd_regs.vhd (text)' 
  sed 's/^X//' << 'SHAR_EOF' > 'lcd_regs.vhd' && 
------------------------------------------------------------------------------- 
-- Title      : LCD controller for Spartan 3E Starter Kit 
-- Project    : 
------------------------------------------------------------------------------- 
-- File       : lcd.vhd 
-- Author     : Wojciech M. Zabolotny <w...@ise.pw.edu.pl> 
-- Company    : 
-- Created    : 2007-12-31 
-- Last update: 2007-12-31 
-- Platform   : 
-- Standard   : VHDL 
------------------------------------------------------------------------------- 
-- Description: This is a sample implementation of state machine 
-- with "state stack", which allows you to implement often used 
-- sequences of states as "subroutines" 
-- This implementation uses registers to implement the stack. 
------------------------------------------------------------------------------- 
-- Copyright (c) 2007 
-- This is public domain code!!! 
------------------------------------------------------------------------------- 
-- Revisions  : 
-- Date        Version  Author  Description 
-- 2007-12-31  1.0      wzab    Created 
------------------------------------------------------------------------------- 
X 
X 
library ieee; 
use ieee.std_logic_1164.all; 
use ieee.numeric_std.all; 
X 
entity lcd_test is 
X   
X  port ( 
X    led            : out std_logic_vector(7 downto 0); 
X    lcd            : out std_logic_vector(7 downto 4); 
X    lcd_rs         : out std_logic; 
X    lcd_rw         : out std_logic; 
X    lcd_e          : out std_logic; 
X    strataflash_oe : out std_logic; 
X    strataflash_we : out std_logic; 
X    strataflash_ce : out std_logic; 
X    sys_clk        : in  std_logic; 
X    sys_rst        : in  std_logic); 
X 
end lcd_test; 
X 
architecture beh of lcd_test is 
X 
X  constant T_CLK : integer := 20;       -- Clock period in ns 
X  type T_LCD_STATE is (L_START, L_WRITE, L_DELAY, L_INIT0, 
X                       L_INIT1, L_INIT2, L_INIT3, L_INIT4, L_INIT5, L_INIT6, L_INIT7, 
X                       L_INIT8, L_INIT9, L_INIT10, L_INIT11, L_INIT12, L_INIT13, L_INIT14, L_INIT15, 
X                       L_INIT16, L_INIT17, L_INIT18, L_INIT19, L_INIT20, L_INIT21, L_INIT22, 
X                       L_WRITED, L_WRITED_1, L_WRITED_2, L_WRITED_3, L_WRITED_4, 
X                       L_WRITE4, L_WRITE4_1, L_WRITE4_2, L_WRITE4_3, 
X                       L_WRITE8, L_WRITE8_1, L_WRITE8_2); 
X  constant STACK_DEPTH : integer                        := 7; 
X  type T_STACK is array (STACK_DEPTH-1 downto 0) of T_LCD_STATE; 
X  signal stack         : T_STACK; 
X  signal stack_ptr     : integer range 0 to STACK_DEPTH := 0; 
X  signal stack_err     : boolean                        := false; 
X  signal lcd_state     : T_LCD_STATE                    := L_START; 
X  signal lcd_cmd       : std_logic_vector(7 downto 0); 
X  signal cnt_del       : integer                        := 0; 
X 
X  signal main_clk, main_rst, main_rst0 : std_logic := '0'; 
X   
begin  -- beh 
X 
X  strataflash_ce <= '0'; 
X  strataflash_we <= '1'; 
X  strataflash_oe <= '1'; 
X 
X  main_clk       <= sys_clk; 
X  led(7)         <= '1' when stack_err else '0'; 
X  process (main_clk, sys_rst) 
X  begin  -- process 
X    if sys_rst = '1' then               -- asynchronous reset (active low) 
X      main_rst  <= '0'; 
X      main_rst0 <= '0'; 
X    elsif main_clk'event and main_clk = '1' then  -- rising clock edge 
X      main_rst0 <= '1'; 
X      main_rst  <= main_rst0; 
X    end if; 
X  end process; 
X 
X  process (main_clk, sys_rst) 
X 
X    procedure STK_PUSH ( 
X      constant next_state : in T_LCD_STATE) is 
X    begin  -- STK_PUSH 
X      if stack_ptr < STACK_DEPTH then 
X        stack(stack_ptr) <= next_state; 
X        stack_ptr        <= stack_ptr + 1; 
X      else 
X        stack_err <= true; 
X      end if; 
X    end STK_PUSH; 
X 
X    procedure STK_RET is 
X    begin  -- stk_pop 
X      if stack_ptr > 0 then 
X        lcd_state <= stack(stack_ptr - 1); 
X        stack_ptr <= stack_ptr - 1; 
X      else 
X        stack_err <= true; 
X      end if; 
X    end STK_RET; 
X 
X    procedure STK_CALL ( 
X      constant called_state, ret_state : in T_LCD_STATE) is 
X    begin  -- STK_CALL 
X      STK_PUSH(ret_state); 
X      lcd_state <= called_state; 
X    end STK_CALL; 
X 
X    procedure STK_JMP ( 
X      constant called_state : in T_LCD_STATE) is 
X    begin  -- STK_CALL 
X      lcd_state <= called_state; 
X    end STK_JMP; 
X 
X    procedure STK_DEL ( 
X      constant delay     : in integer; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- stk_pop 
X      cnt_del <= (delay+T_CLK-1) / T_CLK; 
X      STK_CALL(L_DELAY, ret_state); 
X    end STK_DEL; 
X     
X    procedure STK_WRITE4 ( 
X      constant value4    : in integer range 0 to 15; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITE4 
X      lcd_rs              <= '0'; 
X      lcd_cmd(7 downto 4) <= std_logic_vector(to_unsigned(value4, 4)); 
X      STK_CALL(L_WRITE4, ret_state); 
X    end STK_WRITE4; 
X     
X    procedure STK_WRITE8 ( 
X      constant value8    : in integer range 0 to 255; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITE8 
X      lcd_rs              <= '0'; 
X      lcd_cmd(7 downto 0) <= std_logic_vector(to_unsigned(value8, 8)); 
X      STK_CALL(L_WRITE8, ret_state); 
X    end STK_WRITE8; 
X 
X    procedure STK_WRITED ( 
X      constant value8    : in integer range 0 to 255; 
X      constant ret_state : in T_LCD_STATE) is 
X    begin  -- STK_WRITED 
X      lcd_rs              <= '1'; 
X      lcd_cmd(7 downto 0) <= std_logic_vector(to_unsigned(value8, 8)); 
X      STK_CALL(L_WRITED, ret_state); 
X    end STK_WRITED; 
X 
X    procedure INIT is 
X    begin  -- INIT 
X      lcd_rw          <= '0'; 
X      lcd_e           <= '0'; 
X      lcd             <= (others => '0'); 
X      lcd_state       <= L_START; 
X      led(6 downto 0) <= (others => '0'); 
X      stack_err       <= false; 
X      stack_ptr       <= 0; 
X      cnt_del         <= 0; 
X    end INIT; 
X     
X  begin  -- process 
X    if sys_rst = '1' then               -- asynchronous reset (active low) 
X      INIT; 
X    elsif main_clk'event and main_clk = '1' then  -- rising clock edge 
X      if main_rst = '0' then 
X        INIT; 
X      else 
X        led(6 downto 4) <= std_logic_vector(to_unsigned(stack_ptr,3)); 
X        case lcd_state is 
X          when L_START => 
X            STK_DEL(16_000_000, L_INIT0); 
X            -- Subroutine DELAY 
X          when L_INIT0 => 
X            led(0) <= '1'; 
X            STK_WRITE4(16#3#, L_INIT1); 
X          when L_INIT1 => 
X            STK_DEL(4_200_000, L_INIT2); 
X          when L_INIT2 => 
X            STK_WRITE4(16#3#, L_INIT3); 
X          when L_INIT3 => 
X            STK_DEL(110_000, L_INIT4); 
X          when L_INIT4 => 
X            STK_WRITE4(16#3#, L_INIT5); 
X          when L_INIT5 => 
X            STK_DEL(41_000, L_INIT6); 
X          when L_INIT6 => 
X            STK_WRITE4(16#2#, L_INIT7); 
X          when L_INIT7 => 
X            STK_DEL(41_000, L_INIT8); 
X          when L_INIT8 => 
X            STK_WRITE8(16#28#, L_INIT9); 
X          when L_INIT9 => 
X            STK_DEL(41_000, L_INIT10); 
X          when L_INIT10 => 
X            STK_WRITE8(16#06#, L_INIT11); 
X          when L_INIT11 => 
X            STK_DEL(41_000, L_INIT12); 
X          when L_INIT12 => 
X            STK_WRITE8(16#0C#, L_INIT13); 
X          when L_INIT13 => 
X            STK_DEL(41_000, L_INIT14); 
X          when L_INIT14 => 
X            STK_WRITE8(16#01#, L_INIT15); 
X          when L_INIT15 => 
X            STK_DEL(1_750_000, L_INIT16); 
X          when L_INIT16 => 
X            STK_WRITED(16#45#, L_INIT17); 
X          when L_INIT17 => 
X            STK_WRITED(16#46#, L_INIT18); 
X          when L_INIT18 => 
X            STK_WRITED(16#47#, L_INIT19); 
X          when L_INIT19 => 
X            STK_WRITED(16#48#, L_INIT20); 
X          when L_INIT20 => 
X            STK_WRITED(16#49#, L_INIT21); 
X          when L_INIT21 => 
X            STK_DEL(2_000_000_000,L_INIT20);                       -- we stay here forever 
X          when L_DELAY => 
X            if cnt_del = 0 then 
X              STK_RET; 
X            else 
X              cnt_del <= cnt_del-1; 
X            end if; 
X            -- Subroutine WRITE4 
X          when L_WRITE4 => 
X            led(3)          <= '1'; 
X            lcd_rw          <= '0'; 
X            lcd(7 downto 4) <= lcd_cmd(7 downto 4); 
X            STK_DEL(60, L_WRITE4_1); 
X          when L_WRITE4_1 => 
X            lcd_e <= '1'; 
X            STK_DEL(250, L_WRITE4_2); 
X          when L_WRITE4_2 => 
X            lcd_e <= '0'; 
X            STK_DEL(20, L_WRITE4_3); 
X          when L_WRITE4_3 => 
X            led(3) <= '0'; 
X            STK_RET; 
X            -- Subroutine WRITE8 
X          when L_WRITE8 => 
X            led(2) <= '1'; 
X            STK_CALL(L_WRITE4, L_WRITE8_1); 
X          when L_WRITE8_1 => 
X            STK_DEL(1_000, L_WRITE8_2); 
X          when L_WRITE8_2 => 
X            lcd_cmd(7 downto 4) <= lcd_cmd(3 downto 0); 
X            led(2)              <= '0'; 
X            STK_JMP(L_WRITE4); 
X            -- Subroutine WRITED 
X          when L_WRITED => 
X            led(1) <= '1'; 
X            STK_CALL(L_WRITE4, L_WRITED_1); 
X          when L_WRITED_1 => 
X            STK_DEL(1_000, L_WRITED_2); 
X          when L_WRITED_2 => 
X            lcd_cmd(7 downto 4) <= lcd_cmd(3 downto 0); 
X            STK_CALL(L_WRITE4, L_WRITED_3); 
X          when L_WRITED_3 => 
X            STK_DEL(41_000, L_WRITED_4); 
X          when L_WRITED_4 => 
X            --lcd_rs <= '0'; 
X            led(1) <= '0'; 
X            STK_RET; 
X          when others => 
X            STK_JMP(L_INIT0); 
X        end case; 
X      end if; 
X    end if; 
X  end process; 
end beh; 
SHAR_EOF 
  (set 20 07 12 31 16 41 15 'lcd_regs.vhd'; eval "$shar_touch") && 
  chmod 0644 'lcd_regs.vhd' 
if test $? -ne 0 
then ${echo} 'restore of lcd_regs.vhd failed' 
fi 
  if ${md5check} 
  then ( 
       ${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'lcd_regs.vhd: MD5 check failed' 
       ) << SHAR_EOF 
55c5d9ed49dd08fa9d839c2b9b9e8f41  lcd_regs.vhd 
SHAR_EOF 
  else 
test `LC_ALL=C wc -c < 'lcd_regs.vhd'` -ne 9307 && \ 
  ${echo} 'restoration warning:  size of lcd_regs.vhd is not 9307' 
  fi 
fi 
# ============= lcd_test_tb.vhd ============== 
if test -f 'lcd_test_tb.vhd' && test "$first_param" != -c; then 
  ${echo} 'x -SKIPPING lcd_test_tb.vhd (file already exists)' 
else 
${echo} 'x - extracting lcd_test_tb.vhd (text)' 
  sed 's/^X//' << 'SHAR_EOF' > 'lcd_test_tb.vhd' && 
------------------------------------------------------------------------------- 
-- Title      : Testbench for design "lcd_test" 
-- Project    : 
------------------------------------------------------------------------------- 
-- File       : lcd_test_tb.vhd 
-- Author     : 
-- Company    : 
-- Created    : 2007-12-30 
-- Last update: 2007-12-30 
-- Platform   : 
-- Standard   : VHDL'87 
------------------------------------------------------------------------------- 
-- Description: 
------------------------------------------------------------------------------- 
-- Copyright (c) 2007 
------------------------------------------------------------------------------- 
-- Revisions  : 
-- Date        Version  Author  Description 
-- 2007-12-30  1.0      xl      Created 
------------------------------------------------------------------------------- 
X 
library ieee; 
use ieee.std_logic_1164.all; 
X 
------------------------------------------------------------------------------- 
X 
entity lcd_test_tb is 
X 
end lcd_test_tb; 
X 
------------------------------------------------------------------------------- 
X 
architecture test of lcd_test_tb is 
X 
X  component lcd_test 
X    port ( 
X      led            : out std_logic_vector(7 downto 0); 
X      lcd            : out std_logic_vector(7 downto 4); 
X      lcd_rs         : out std_logic; 
X      lcd_rw         : out std_logic; 
X      lcd_e          : out std_logic; 
X      strataflash_oe : out std_logic; 
X      strataflash_we : out std_logic; 
X      strataflash_ce : out std_logic; 
X      sys_clk       : in  std_logic; 
X      sys_rst       : in  std_logic); 
X  end component; 
X 
X  -- component ports 
X  signal led            : std_logic_vector(7 downto 0); 
X  signal lcd            : std_logic_vector(7 downto 4); 
X  signal lcd_rs         : std_logic; 
X  signal lcd_rw         : std_logic; 
X  signal lcd_e          : std_logic; 
X  signal strataflash_oe : std_logic; 
X  signal strataflash_we : std_logic; 
X  signal strataflash_ce : std_logic; 
X  signal main_clk       : std_logic; 
X  signal main_rst       : std_logic; 
X 
X  -- clock 
X  signal Clk : std_logic := '1'; 
X 
begin  -- test 
X 
X  -- component instantiation 
X  DUT: lcd_test 
X    port map ( 
X      led            => led, 
X      lcd            => lcd, 
X      lcd_rs         => lcd_rs, 
X      lcd_rw         => lcd_rw, 
X      lcd_e          => lcd_e, 
X      strataflash_oe => strataflash_oe, 
X      strataflash_we => strataflash_we, 
X      strataflash_ce => strataflash_ce, 
X      sys_clk       => main_clk, 
X      sys_rst       => main_rst); 
X 
X  -- clock generation 
X  Clk <= not Clk after 10 ns; 
X  main_clk <= Clk; 
X   
X  -- waveform generation 
X  WaveGen_Proc: process 
X  begin 
X    -- insert signal assignments here 
X    main_rst <= '1'; 
X    wait until Clk = '1'; 
X    wait for 300 ns; 
X    main_rst <= '0'; 
X    wait for 500_000_000 ns; 
X  end process WaveGen_Proc; 
X 
X   
X 
end test; 
X 
------------------------------------------------------------------------------- 
X 
configuration lcd_test_tb_test_cfg of lcd_test_tb is 
X  for test 
X  end for; 
end lcd_test_tb_test_cfg; 
X 
------------------------------------------------------------------------------- 
SHAR_EOF 
  (set 20 07 12 31 01 14 25 'lcd_test_tb.vhd'; eval "$shar_touch") && 
  chmod 0644 'lcd_test_tb.vhd' 
if test $? -ne 0 
then ${echo} 'restore of lcd_test_tb.vhd failed' 
fi 
  if ${md5check} 
  then ( 
       ${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'lcd_test_tb.vhd: MD5 check failed' 
       ) << SHAR_EOF 
d601df1b5aa846da3f477cdd4eff918b  lcd_test_tb.vhd 
SHAR_EOF 
  else 
test `LC_ALL=C wc -c < 'lcd_test_tb.vhd'` -ne 3079 && \ 
  ${echo} 'restoration warning:  size of lcd_test_tb.vhd is not 3079' 
  fi 
fi 
# ============= lcd_test.ucf ============== 
if test -f 'lcd_test.ucf' && test "$first_param" != -c; then 
  ${echo} 'x -SKIPPING lcd_test.ucf (file already exists)' 
else 
${echo} 'x - extracting lcd_test.ucf (text)' 
  sed 's/^X//' << 'SHAR_EOF' > 'lcd_test.ucf' && 
NET "LED[7]" LOC = "F12" | IOSTANDARD = "LVCMOS33"; 
NET "LED[6]" LOC = "E12" | IOSTANDARD = "LVCMOS33"; 
NET "LED[5]" LOC = "E11" | IOSTANDARD = "LVCMOS33"; 
NET "LED[4]" LOC = "F11" | IOSTANDARD = "LVCMOS33"; 
NET "LED[3]" LOC = "C11" | IOSTANDARD = "LVCMOS33"; 
NET "LED[2]" LOC = "D11" | IOSTANDARD = "LVCMOS33"; 
NET "LED[1]" LOC = "E9" | IOSTANDARD = "LVCMOS33"; 
NET "LED[0]" LOC = "F9" | IOSTANDARD = "LVCMOS33"; 
NET "LCD[7]" LOC = "M15" | IOSTANDARD = "LVCMOS33"; 
NET "LCD[6]" LOC = "P17" | IOSTANDARD = "LVCMOS33"; 
NET "LCD[5]" LOC = "R16" | IOSTANDARD = "LVCMOS33"; 
NET "LCD[4]" LOC = "R15" | IOSTANDARD = "LVCMOS33"; 
NET "LCD_RS" LOC = "L18" | IOSTANDARD = "LVCMOS33"; 
NET "LCD_RW" LOC = "L17" | IOSTANDARD = "LVCMOS33"; 
NET "LCD_E" LOC = "M18" | IOSTANDARD = "LVCMOS33"; 
NET "STRATAFLASH_OE" LOC = "C18" | IOSTANDARD = "LVCMOS33"; 
NET "STRATAFLASH_WE" LOC = "D17" | IOSTANDARD = "LVCMOS33"; 
NET "STRATAFLASH_CE" LOC = "D16" | IOSTANDARD = "LVCMOS33"; 
NET "SYS_CLK" LOC = "C9" | IOSTANDARD = "LVCMOS33"; 
NET "SYS_RST" LOC = "K17" | IOSTANDARD = "LVCMOS33" | PULLDOWN; 
NET "sys_clk" TNM_NET = "sys_clk"; 
TIMESPEC "TS_sys_clk" = PERIOD "sys_clk" 20 ns HIGH 50 %; 
OFFSET = IN 10 ns BEFORE "sys_clk"  ; 
OFFSET = OUT 10 ns AFTER "sys_clk"  ; 
SHAR_EOF 
  (set 20 07 12 30 23 10 46 'lcd_test.ucf'; eval "$shar_touch") && 
  chmod 0644 'lcd_test.ucf' 
if test $? -ne 0 
then ${echo} 'restore of lcd_test.ucf failed' 
fi 
  if ${md5check} 
  then ( 
       ${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'lcd_test.ucf: MD5 check failed' 
       ) << SHAR_EOF 
802f00a019965e0d378e2cf3d4d1d5d3  lcd_test.ucf 
SHAR_EOF 
  else 
test `LC_ALL=C wc -c < 'lcd_test.ucf'` -ne 1242 && \ 
  ${echo} 'restoration warning:  size of lcd_test.ucf is not 1242' 
  fi 
fi 
# ============= test.sh ============== 
if test -f 'test.sh' && test "$first_param" != -c; then 
  ${echo} 'x -SKIPPING test.sh (file already exists)' 
else 
${echo} 'x - extracting test.sh (text)' 
  sed 's/^X//' << 'SHAR_EOF' > 'test.sh' && 
#!/bin/bash 
set -e 
# Compile the VHDL 
VHDLS="\ 
X lcd_ram.vhd \ 
X lcd_test_tb.vhd \ 
X " 
STD=standard 
mkdir -p work 
#STD=synopsys 
ghdl -a --workdir=work --std=02  --ieee=$STD $VHDLS 
ghdl -e --workdir=work --std=02  --ieee=$STD lcd_test_tb 
# Run the simulation 
X./lcd_test_tb --wave=lcd.ghw --stop-time=10000000ns 
# Let'us view the recorded waveforms 
gtkwave lcd.ghw lcd.sav 
SHAR_EOF 
  (set 20 07 12 31 16 34 06 'test.sh'; eval "$shar_touch") && 
  chmod 0764 'test.sh' 
if test $? -ne 0 
then ${echo} 'restore of test.sh failed' 
fi 
  if ${md5check} 
  then ( 
       ${MD5SUM} -c >/dev/null 2>&1 || ${echo} 'test.sh: MD5 check failed' 
       ) << SHAR_EOF 
93fc50b3bec3d00c88e6af999e8da36d  test.sh 
SHAR_EOF 
  else 
test `LC_ALL=C wc -c < 'test.sh'` -ne 368 && \ 
  ${echo} 'restoration warning:  size of test.sh is not 368' 
  fi 
fi 
if rm -fr ${lock_dir} 
then ${echo} 'x - removed lock directory `'${lock_dir}\''.' 
else ${echo} 'x - failed to remove lock directory `'${lock_dir}\''.' 
  exit 1 
fi 
exit 0

Added after 5 minutes:

here is small explanation regarding code

Playing with the Spartan 3E Starter Kit reference designs, I've found the
following "Exercise" in the "Initial Design - LCD Display Control).
Exercise: Implement a hardware state machine which can perform
the LCD initialisation sequence. Compare the size of your implementation
with the 96 slices required to implement a PicoBlaze processor.
Trying to implement a required state machine, I've found an idea which is
quite interesting, but may also seem to be crazy:
A state machine with "soubroutines". The idea is to implement typical
state sequences as "subroutines", which may be "called" after pushing
the next state to the stack.
There are two implementations provided. One implements the stack in
registers, but "return" requires only a single cycle. The another one
uses additional clock cycle, to simplify access to the stack, which allows
XST to implement the stack in the inferred RAM.
The resulting code requires 159 slices in version with stack in inferred
RAM, or 189 slices in the version with stack implemented in registers.
The code heavily uses VHDL procedures, but synthesizes correctly with XST.
I have also a version, where procedures are replaced with M4 macros,
so you can generate the "procedure-free" VHDL for less advanced synthesis
tools.
The code is published as public domain. Maybe someone will find this idea
useful?
The sources contain also the GHDL testbench: lcd_test_tb.vhd, and the shell
script needed to run it.
If you are going to run the simulation however, change the definition
of the T_CLK from:
constant T_CLK : integer := 20;
to:
constant T_CLK : integer := 2000;
Otherwise the simulation will be very loooong, and the resulting file will
occupy a lot of space.

dmk · Apr 14, 2008

Yes, it is much complicated.
I dont have time at this moment, probably after a month I could try to realize something, although I am not shure I will have that time.

shadeslayer · Apr 14, 2008

actuly i mnot sure that it will work for me ,, thr are lot of madification to b done in that to run it ,,, u can observe it by wht thy said in the explanation

shadeslayer · Apr 16, 2008

whn i tried to open the project file u gave to me ,, its giving error that project is locked ,,, i dint understood it ,,,

dmk · Apr 16, 2008

It doesnt matter - you should say it to override it.

shadeslayer · Apr 18, 2008

i tried it ,, but at the time of simulation it gives me error ,,, and m not abel to simulate it got get output due to this ,,,, can i write all this 3 codes in one file say pick.vhd and thn simulate it ,,,

dmk · Apr 18, 2008

No, you cannot. I will see and suggest what to do in a few minutes.

Added after 1 hours 20 minutes:

Here are the ziped files and a short explanation.

shadeslayer · Apr 19, 2008

YEH I SEEN IT.. ITS GOOD I HAVE TO TRY IT 1ST ,,THANK U

shadeslayer · Apr 23, 2008

i m not abel to do proper settings of test bench file ,, can u tell me the settings please,??

i tried the testbench file u gave me but its giving me error so not working properly

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