Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Could it be that the receiver just uses another crc algorithm (different polynomial or additional parameters)?
You have to analyze data with known correct crc to find out the used algorithm. of course it may be also an error in implementation. You can use one of the web crc calculators e. g. linked at wikipedia to check your crc results.
Assuming that you have a data width of 32 in the transmitter and another 8 bits of crc bits padded, can you tell me how you are doing the checking on the receiver side?
If you feel that the problem might be at your end, have u checked the parallel crc encoder circuit that you are using with a serial LFSR ? if i'm not mistaken, it'll take the same number of clock cycles as the degree of ur polynomial
if u want to, i can post the serial crc code if u provide the polynomial
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.