How to use via as a Testpoint ?

can a VIA be used as a Testpoint?
what is the difference between a TENTED via and a TINNED via?

VIA as a Testpoint

Yes, via can be use as test point if exposed or untented. Don't cover the via with solder mask so it can be used for engineering test point.

Tinned via is a plated via.

VIA as a Testpoint

Yes it can be used.

However it is not always a good thing to do.

Test probes can exert quite a force on the board and can damage the via/barrel so that it fails after test.

or so I have read/heard, as since then I have never used vias for testpads.

VIA as a Testpoint

Cyberrat,
That is a new one on me and something to definitely think about. Do you just use a surfacemount testpoint stubbed off of the via or pin then?

Re: VIA as a Testpoint

I have worked on equipment where vias were used as test points. I have never seen one damaged by using it as a test point. The one thing that does damage them is when you heat it with a soldering iron

VIA as a Testpoint

I use a surface pad, testpoint only, I do not use a component pad. I dont use a via.

It is advised not to stub off with a teest point, this can cause EMC problems. it is best being in line with a track.

these are the "reccomended" things by most knowledgable organisations.

hence I have never had a problem.

yes we use bed of nails type fixtures that put a lot of pressure on the board, although each individual probe is not as lot, they can be sharp.

If you use vias they will need no solder resist on them, which can lead to solder getting in them & outgassing etc.

but circyumstances may depict that you need to use them, after all you only usually test a board once then its sold.
hoever, how do you tell that the test has not caused a premature failure of the via? this does not get tested for.

so I would reccomend that where you can fit a test pad, then do so, where you cannot then use whatever else you can get at &the last thing to use is a via.

VIA as a Testpoint

Hi
Its better to use SMD testpad or any test point components separately. But the placement of the testpad is in the flow of the signal. It should not make any stub.

Re: VIA as a Testpoint

cyberrat said:

Yes it can be used.

However it is not always a good thing to do.

Test probes can exert quite a force on the board and can damage the via/barrel so that it fails after test.

or so I have read/heard, as since then I have never used vias for testpads.

Click to expand...

We can use either Via or TP,
suppose our routing is in External layer we can use SMD TP, otherwise. we can go for Thro hole.
we can use routing via as TP.
only thing is we have to increase the size of the via littile bit for easy testing

thanks
Vengat T

Re: VIA as a Testpoint

yes,put the surface testpoint on the track directly can avoid
the signal integrity problem.

VIA as a Testpoint

You can use via as test point, but you have to make soldermask cleared on the test side also need to increase the via pad size so that the test pin can touch the pad

VIA as a Testpoint

In my company where we have requirement of 100% testability we use via modified to testpoint. since the boards are very dence and we do not have space to fit extra testpoint or pads so we use vias which are used for routing and also add where ever necessary. till now we did not receive any complaint over this.

Re: VIA as a Testpoint

Tented via: Via covered by solder resist (not exposed).

Tinned via: Plated via