xiexi
Member level 4
Now I use 5V process to design HV 7.5V, the only problem is that I am not sure if the parasitic diode's (P+ to Nwell, Nwell to Psub, N+ to Pwell) revise voltage can suffer 7.5V in operation and is there any problem? The attachment is the Electircal parameter about this process, but I don't find the information I need. Thanks for your instruction.