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Why cannot initial statement be synthesizeable

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kunal1514

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why cannot initial statement be synthesizeable

Hi All,

Can any body tell me that Why cannot initial statement be synthesizeable.


Give me logical reasoning.

Regard's

Kunal Mishra
 

why cannot initial statement be synthesizable ?

Hi,


The initial statement is not synthesizable.please write a code with the initial statement and try to convert that statement into the gates then u will know the ans.
regards,
ramesh.s
 

why cannot initial statement be synthesizable

Please don't create multiple discussions with the same question:
 

why cannot initial statement be synthesizeable

Its written in the IEEE doc that initial can be used in RTL for modelling ROM.

Check
Standard syntax and semantics for Verilog ®HDL-based RTL synthesis.



I dont have experience in RTL.
But according to this doc, It is synthesizeable.
 
why initial statement not synthesizable

ASIC flipflops do not have a built-in power-on/initialization circuit. This circuitry must be designed and implemented manually. Therefore, most ASIC synthesis tools cannot handle the 'initial' statement.

FPGAs work a little differently. The "power-on" state is defined as the moment right after FPGA-configuration cycle finishes. This means the 'power-on' state can be stored in the configuration-bitstream. And Xilinx XST supports the Verilog "initial" block (and VHDL attribute) for setting power-up value of flipflops.
 

verilog initial poweron

There is no equivalent hardware module for "initial "... I believe that initial is used only once during the RTL simulation...

guys please post more comments on this..

KK
 

synthesizing initial statement

Initial is used to model ROM. Its mentioned in IEEE.

I dont know weather any vendor supports it.
 

why cannot initial statement be synthesizeable ?

initial statement is used to initialise any i/p value from where the simulation has to start.
if we donot use initail value in our test bench.. then the initial value of input will be taken as dont care and o/p will be also dont care.
 

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