Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Why do we use D flops mostly in ASIC designing?

Status
Not open for further replies.

vikas_lakhanpal27

Member level 1
Member level 1
Joined
Jan 16, 2008
Messages
39
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,522
Re: D FLOPS

Why do we use D flops mostly in ASIC desgning?

Added after 1 hours 8 minutes:

Is it because of simplicty of D flop? Is it bcoz of less power consumption as comparion to other flops? It I am not exactly sure about its reason so want to confirm it from you guys.
 

D FLOPS

Because D fliplops are transparent and we don't have any race around conditions compare to other flip flops

When u take jk or sr flip flops u have race around conditions right ? so to avoid all those things u make use of d flops
Hope it is clear to u
Don't forget to push help button
Bye take care
 
Re: D FLOPS

thanks. But wat about power consumptiòn? D Flop takes less power than other flops.
 

Re: D FLOPS

Power consumtion depends on transistors, usually there are several libraries with different speed and power consumption. It is a trade-off between speed and power consumption.
 

Re: D FLOPS

Agreed with u that power consumption depends upon no. of transitors but my question is that D flip flop I guess consumes lesser power than other flops. Is this also a reason behind using D-flops in designing ASICs?
 

Re: D FLOPS

may be this is also one of the reason.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top