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What kind of delay is needed to eliminate the dead zone effect in PFD?

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benchen

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I know to eleminate the effect of dead zone in PFD, delay module is intentionally added. My question is how long should this delay be? Is there any priciple about that?
The CP needs some time to reach its stable current. So should this delay be long enough to wait for the CP to be stable or just a short time to make the CP turn on?
Thanks/
 

A quesion about PFD

The dead zone is actually determined by the time required to charge the node capacitances of your charge pump transistors. Hence you add delay in the reset path of the your PFD. While calculations on the capacitors of the PMOS/NMOS pairs will give you a theoritical value of the minimum pulse width, a good thing to do is to go for a programmable delay chain of inverters which will thicken the reset pulses.

So, put a delay chain of inverters and then program them to adjust the delay
 

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    benchen

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Re: A quesion about PFD

Another thing should be noticed is too long delay also decrease the phase detection range.
 

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