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design for testability : JTAG

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hi

how can a dft engineer makes out whether the netlist has jtag in it .

What steps should be taken it it has jtag in it in both dftadvisor and fastscan.

thanks in advance
 

hi,

you can get that information by observing the TCK clock fanout tree.if there are some flops that are there on the tck clock then mostly u r design has jtag.

Regards,
Ramesh.S
 

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    gold_2007

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Just look for the TAP interface. If the chip is JTAG compliant, it has a 4 or 5 pin interface, which consists of TCK, TDI, TMS, TDO and maybe TRSTn.

John
 

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