alzomor
Advanced Member level 2
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Hi
I am a new comer to Xilinx Chipscope and have some questions
In chipscope user guide I found this phrase
"The ICON core provides a communications path between the JTAG Boundary Scan port of the target FPGA and up to 15 ILA"
*Dose that mean that I should put ICON with any other core?
*so If I am using only one ILA , is it required to put both ICON & ILA?
IS a single ILA is enough for probing my whole design ?
Salam
Hossam Alzomor
w ww.i-g.org
Hi
I am a new comer to Xilinx Chipscope and have some questions
In chipscope user guide I found this phrase
"The ICON core provides a communications path between the JTAG Boundary Scan port of the target FPGA and up to 15 ILA"
*Dose that mean that I should put ICON with any other core?
*so If I am using only one ILA , is it required to put both ICON & ILA?
IS a single ILA is enough for probing my whole design ?
Salam
Hossam Alzomor
w ww.i-g.org