Gray code, binary code, one hot coding

one hot coding

As every body know gray coding ,bonary coding and one hot coding are there.

depending on this we can calculate the number of F/fs on number of states.

my question is where do we use this and why is this necessary?


thanks
phutane

difference between onehot and binary encoding

Binary Encoding : It is almost used everywhere, in all state machines, by default.
Advantages: Less FFs as compared to one-hot
One-hot encoding: If you need to design a faster state machine, you would benefit by one-hot-encoding, because you wont have to decode the state.
Gray Encoding: These will use the same number of FFs as Binary Encoding, but it has a great advantage over binary in cetrain cases. Because it has a hamming distance of 1 between two codes, it is a very rilable count. i.e only one bit changes when the count advances. So it is used in Address counters for fifos, when implementing an interface between 2 Async Clock domains.

one hot encoding

Thanks Dude,

what is actual use of this code. among this which one is used mostly widely used.

with regards
phutane

one-hot coding

Use of Gray code? is that you are asking.
Actually its a long story.
Take an example where say n bit data is comming from a block A running at 100MHz, and going to a block B running at 133MHz. So to send the data from one clock domain to the other, ppl use Fifos. Now to reliably tell how much data is in the fifo which is being clocked by A clock i.e 100MHz, the write pointer of the fifo(which is also clocked at 100MHz in this example) would have to be read by a block B running at 133MHz. So I will use gray coded counters for this fifo pointer instead of normal binary coded counters, so that bclk B running at 133MHz could relibly capture the vlue of this pointer, which is being clocked at 100MHz. Since only one bit is going to change, for every count change these codes are very reliable. To know more do a google search for "async clock domains"
Kr,
Aviral Mittal

gray coded bus

Avimit,

I am confused. Now my question stands what is the need of FIFO here.

decoding gray binary

Good Question. Well, to explain it on this board is bit of a challenge, but I will give it a shot:
ok, do you know something called metastability?
If D input of a FF changes very close to the clock edge of the FF, there are chances that the FF can go into a metastable state. i.e its o/p will be undefined for a short period of time, and this undefined state will propogate furthur down your circuit, and may cause it to fail completely.

Now in our example Block A runs at 100MHz and block B runs at 133MHz. Now if a single bit of data comes from Block A which is an o/p of a FF which uses A clock @ 100MHz, and it goes into a block B to a D input of a FF, which uses B clock @ 133MHz, very frequently, the change in D input of the FF in block B@133MHz can come very close to the Clock edge of this FF in block B, and it may cause it to become metastable.


Now to avoid it, ppl use metastable hardened FFs on the bounday of the receving blocks, in our case in block B.
And ppl use 2 such FFs connected in series. So the signal comes from Block A, goes into D input of a MSH(MetaStableHardned) FF, which is using clk B(133 MHz), then it comes out of its Q o/p, then it agains enters the D input of another MSH FF, and the Q of this second FF using clock B @ 133MHz is then a reliable signal, which can be used further in block B running at 133MHz.

So all that trouble for a 1 bit signal to cross clock domains.

Now the question is what if we have a data bus?(no dont think that connecting 2 MSH FFs in series as above to each of the bit of the data bus would work).
Think wot might be the problem if you do that.
Once you have gone through it, I wll further write to you to explain why we need fifos.
But remember you will have to get me an answer to it or going furhter would not help you. So take a paper/pencil draw waveforms, consult google, and try to realize wot is the prob here. Try to draw wavefomrs of a 4 or 8 bit bus coming from A going to B, under worst case scenearios.
Whenever the time distance between the change in D and Q at an receving FF in B block @ 133Mhz is less than its Tsetup, you wont know what is the o/p.

one hot encoding versus binary

one-hot( may be one-cool as 11111110111) is usually used in fpga design.because fpga has plenty of DFFs.

binary fifo pointer considerations

dear avmit,

According to u or us, here is a transfer of data from slow domain clock to fast domain clock (From 100mhz to 130mhz). So we need to use a FIFO or Handshaking techinque so that metastability can be avoided or data lost can be avoided.

But FIFO are more useful in Fast to Slow domain.

hope iam right?

But i am not clear in Slow to fast data transfer technique.

can u explain

phutane

gray code error

The frequencies are just an example, I didnt took a note of it which one is higher or lower, yes handshaking for fifo anything may be used depending upon it. Sorry about a not so good example there

gray to binary code

What is the final conclusion for our matter.

i started with one thing, but we r in other end.

Phutane

use for gray code

OK: here is the final conclusion:
One Hot encoding: used to make state machines work faster
Gray Coding : Used in Counters which are used to address the fifos used in clock domain crossing. They are also used in comms, but I am not an expert on that

gray encoding in fifos

Gray coding is used in areas where the probability of error is high but is not tolerable..
In binary coding if a single bit is changed the difference between the resulting number and the original number is high i.e the error is high
whereas in gray coding error in a single bit leads to its adjacent number. so the error is very less compared to binary codes

hot to write binary code

One-hot encoding: If you need to design a faster state machine, you would benefit by one-hot-encoding, because you wont have to decode the state.


can u explain wat is state decoding and y it is not reqd in one hot

one hot encoded fifo

state decoding means how to decode a a state machine variable . Suppose you have a 5 bit state machine variable it can have 32 possible states ranging from 0 to 31. Now if you want to decode whether you are in state 7 you would have to check that the lower 3 bits of the variable are 1 and upper two bits are 0. This will require some gates to decode the state, hence the decoding gets delayed.

On the other hand if you have a 32 bit variable for state and ensure that only one of the bit is active at all all times (one hot) we can simply check bit position 7 to detrmine if we are in state 7 or not this will require no gates hence decoding is faster.