Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

by fixing setup violations will it creat hold violations ?

Status
Not open for further replies.
V

vishalkatba

Newbie level 6
Newbie level 6
Joined
Sep 18, 2006
Messages
14
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,399
I am fixing my setup violations in design by reducing delay of my data path. so will it creat hold violations for these paths. or what are the conditions for which it will creat hold violations at the time of fixing setup?
 

Re: by fixing setup violations will it creat hold violations

it depends on how u fix setup violations
1. can be register balacing
2. reducing combo logic
3. by clock skewing.

setup fix may lead to hold violations . for example to reduce setup the hold window will get reduced if combo logic is reduced. ot if you skew the clock late setup will improve but hold time will be eaten up
dada
 
Could Setup violations happen in min-delay checks and Hold violations in max delays?

Could Setup violations happen in min-delay checks and Hold violations in max delays?
 
Re: by fixing setup violations will it creat hold violations

Hi dada ,
wht is more crucial , hold violation or setup violation. If we have to choose anyone between them , what will we fix? (I was asked this question in AMD interview) . i said hold is more crucial , bcoz we can fix setup violation after DFM by adjusting clock period , but Hold can't be fixed after DFM .

dada said:
it depends on how u fix setup violations
1. can be register balacing
2. reducing combo logic
3. by clock skewing.

setup fix may lead to hold violations . for example to reduce setup the hold window will get reduced if combo logic is reduced. ot if you skew the clock late setup will improve but hold time will be eaten up
dada
Click to expand...
 
  • Like
Reactions: ivlsi

    ivlsi

    ivlsi

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top