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Need information about DFT [ Design for Testability ]

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shrenik

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Hi,
I am shrenik Mehta. I am an ASIC verification engineer.
I need some information about DFT [ Design For Testability ]. What is DFT and where it is used and How it is used? which tools are used for DFT?

I need to design an RTL and need to use DFT [ Why I need to know. something like to generate scan chain ]. Then I need to impliment entire testbench to check it.

I need
1] Some material for DFT.
2] Source of tool for the DFT.

Can you please help me for all this?
waiting for your favourable reply.

Regards,
Shrenik Mehta
 

well DFT is for testing chip !!! it will take care of manufacturing defects ! ..

U can use Design compiler for DFT scan insertion !!
 
please go through this file
 
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    maah

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naaj_ila said:
Send your mail id i will send u the best material for that DFT.....okay
Click to expand...

We will appreciate if you share it with us as well ..
 

its okay i am saying because it is having about 10 files ..i am ready to share ..
okay then i will send some of them okay
 

naaj_ila said:
its okay i am saying because it is having about 10 files ..i am ready to share ..
okay then i will send some of them okay
Click to expand...

you can zip/rar them in one file and upload it to the forum .. or upload the files individually ..
 

hopefully these lectures are not available online .. if so, just give us the link to ..
 

sorry my friend i didnot have the address ..i got this from my friend who was an employee in DFT work..he had nt provided taht one ...
 

naaj_ila said:
sorry my friend i didnot have the address ..i got this from my friend who was an employee in DFT work..he had nt provided taht one ...
Click to expand...

ok .. go ahead
 

USeful material. Can you please share lect01 and lect06 as well ?
 

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