lhlbluesky
Banned
i have simulated a circuit of precisely multiply by 2(allen book,chapter 12),but my results are always not correct,the circuit is consist of a amp( cascoded amp) 5 switchs---s1 s2 sampling,s3 reset,s4 s5 amplify,this is my netlist,pls check it for me
thanks first!
*muiti2
.options list node post
.lib 'F:\hspice\ms018_v1p4.lib' tt
.op
vdd vdd 0 1.8v
m1 x in1 1 0 n18 l=0.2u w=1.2u
m2 y in2 1 0 n18 l=0.2u w=1.2u
m3 out1 b2 x vdd p18 l=0.4u w=3.2u
m4 out2 b2 y vdd p18 l=0.4u w=3.2u
m5 x 2 vdd vdd p18 l=0.2u w=1.4u
m6 y 2 vdd vdd p18 l=0.2u w=1.4u
m7 out1 b1 3 0 n18 l=0.4u w=0.4u
m8 out2 b1 4 0 n18 l=0.4u w=0.4u
m9 3 out1 0 0 n18 l=0.2u w=0.2u
m10 4 out1 0 0 n18 l=0.2u w=0.2u
m11 1 6 0 0 n18 l=0.2u w=0.2u
mb1 6 6 0 0 n18 l=0.2u w=0.2u
mb2 2 2 vdd vdd p18 l=0.2u w=0.2u
iref1 vdd 6 10ua
iref2 2 0 1ua
vin1 in1 0 0.9v
vb1 b1 0 0.75v
vb2 b2 0 1.05v
c1 out2 0 500ff
vip ip 0 0.7v
vg g 0 0.9v
mn11 i clk1 ip 0 n18 l=0.2u w=0.2u
mn12 h clk2 ip 0 n18 l=0.2u w=0.2u
mn13 out2 clk3 in2 0 n18 l=0.2u w=0.2u
mn14 out2 clk4 i 0 n18 l=0.2u w=0.2u
mn15 h clk5 g 0 n18 l=0.2u w=0.2u
cs in2 h 500ff
cf in2 i 500ff
vclk1 clk1 0 pulse(1.8v 0v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk2 clk2 0 pulse(1.8v 0v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk3 clk3 0 pulse(1.8v 0v 4.9ns 0.05ns 0.05ns 5.1ns 10ns)
vclk4 clk4 0 pulse(0v 1.8v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk5 clk5 0 pulse(0v 1.8v 5ns 0.05ns 0.05ns 5ns 10ns)
.tran 0.05ns 40ns
.print tran v(out2)
.end
Added after 3 minutes:
https://obrazki.elektroda.pl/59_1178176909.jpg
thanks first!
*muiti2
.options list node post
.lib 'F:\hspice\ms018_v1p4.lib' tt
.op
vdd vdd 0 1.8v
m1 x in1 1 0 n18 l=0.2u w=1.2u
m2 y in2 1 0 n18 l=0.2u w=1.2u
m3 out1 b2 x vdd p18 l=0.4u w=3.2u
m4 out2 b2 y vdd p18 l=0.4u w=3.2u
m5 x 2 vdd vdd p18 l=0.2u w=1.4u
m6 y 2 vdd vdd p18 l=0.2u w=1.4u
m7 out1 b1 3 0 n18 l=0.4u w=0.4u
m8 out2 b1 4 0 n18 l=0.4u w=0.4u
m9 3 out1 0 0 n18 l=0.2u w=0.2u
m10 4 out1 0 0 n18 l=0.2u w=0.2u
m11 1 6 0 0 n18 l=0.2u w=0.2u
mb1 6 6 0 0 n18 l=0.2u w=0.2u
mb2 2 2 vdd vdd p18 l=0.2u w=0.2u
iref1 vdd 6 10ua
iref2 2 0 1ua
vin1 in1 0 0.9v
vb1 b1 0 0.75v
vb2 b2 0 1.05v
c1 out2 0 500ff
vip ip 0 0.7v
vg g 0 0.9v
mn11 i clk1 ip 0 n18 l=0.2u w=0.2u
mn12 h clk2 ip 0 n18 l=0.2u w=0.2u
mn13 out2 clk3 in2 0 n18 l=0.2u w=0.2u
mn14 out2 clk4 i 0 n18 l=0.2u w=0.2u
mn15 h clk5 g 0 n18 l=0.2u w=0.2u
cs in2 h 500ff
cf in2 i 500ff
vclk1 clk1 0 pulse(1.8v 0v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk2 clk2 0 pulse(1.8v 0v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk3 clk3 0 pulse(1.8v 0v 4.9ns 0.05ns 0.05ns 5.1ns 10ns)
vclk4 clk4 0 pulse(0v 1.8v 5ns 0.05ns 0.05ns 5ns 10ns)
vclk5 clk5 0 pulse(0v 1.8v 5ns 0.05ns 0.05ns 5ns 10ns)
.tran 0.05ns 40ns
.print tran v(out2)
.end
Added after 3 minutes:
https://obrazki.elektroda.pl/59_1178176909.jpg