internal clock division and delay call in coolrunnerII

Hi, guys
I'm experiencing the following problem:
I am trying to implement a design on Xilinx CoolRunner II using ISE WebPack 7.1.i_04. The design is written in Verilog. The design uses 1.8432MHz clock which is needed to be internally divided to become ~10Hz. Can you help me out on this?
My initial idea is to use counters. will this be ok? any other way?

Also, if needed to call on the delay within the program, similar to microcontrollers, how to implement this?

Any help is appreaciated

You could build a divide-by-184320 counter and output the MSB. Example below.

Please clarify what you mean by "call on the delay within the program". Do you want to do something ten times per second?

echo47,

thanks for the idea of using a multiplexer. will try to implement this.

my question on call on delay is similar to what we normally use in microcontroller. very simple example is turning on and off of LED,(admittedly microcontroller is more practical), just to cite an example. in microcontroller, we use delay subroutines and then call on it to delay an operation. something similar to this but in cpld or fpga implementaion. hope this clears up the question.

thank you in advance.

The ? : operator is not necessarily a multiplexer. It's simply a more compact way of writing this:
Remember that Verilog is digital logic design. You are building a logic circuit, similar to hooking up TTL or CMOS chips on a breadboard. You build small sections, and connect them together to create a larger system. For example, you could connect my 'top' module to an LED, and it will blink at 10 Hz.

A hardware timer can be simple or complex, depending on what it needs to do. Does your timer need to start and stop, or can it simply free-run like my example? A free-running timer is an easy way to generate a repeating sequence of actions. It can turn things on and off as the count passes your predetermined values.

Some CPLDs are very small. For example, an XC2C32A has only 32 macrocells, so my 18-bit timer example would consume more than half of the device.