arghpok
Member level 3
The gate dielectric thickness is approaching atomic dimensions and at 1.2 nm in the 90nm node is about five atomic layers of oxide. If you look at the figure you'll see that gate oxide scaling is slowing as it approaches the limit, which is one atomic layer thick. The points is, ¿ anybody does know about any transistor model which take into account the effects of such physical restriction pretty viewable here like gate leakage current ?
and, ¿ Which are the new materials for the gate and how they increase the process costs ?
[/img]http://rapidshare.com/files/19073567/fig1p1.GIF.html
and, ¿ Which are the new materials for the gate and how they increase the process costs ?
[/img]http://rapidshare.com/files/19073567/fig1p1.GIF.html
