Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

help needed in designing fully diff amp very urgent plz repl

Status
Not open for further replies.

f2003588

Junior Member level 3
Junior Member level 3
Joined
Feb 24, 2007
Messages
26
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Location
INDIA
Activity points
1,466
1. Low frequency Open Loop Gain>=100db

2. Unity Gain Bandwidth>=150MHz

3. Input Referred Offset<.01mV

4. Phase Margin>=60

5. Slew Rate=20v/mus

plzz help whether it will be possible to design fully diff amp with above specs r not..

if nt possible will it be possible to meet atleast any 3 of them can be met r nt(including gain) r around which values we can design them plzz help
 

Re: help needed in design of fully diff amp very urgent plz

What technology are you using? CMOS (size), BiCMOS?
 

Re: help needed in design of fully diff amp very urgent plz

maybe the folded-cascode opamp with gain-boosting is feasible
for input referred offset, there are some circuit technologies may be used
 

Re: help needed in design of fully diff amp very urgent plz

It doesn't makesense of the GBW=450MHz.
It's too large. If your GBW=450MHz then your SR will more than 20 v/us.
Since your GBW=450MHz, I think your differentail pair input would be very very big. (Consume large area and power).
If your GBW wnat be <=100 MHz, there is a lots of type opamp your can use.
(like, tow-satge, folded-cascode, balance ...etc).
 

Re: help needed in designing fully diff amp very urgent plz

its cmos technology

vdd=3.3v

C>=1pF

power consumption shud be as low as possible..

GBW>=150Mhz (sorry for the previous value)

feature size::the technology is 0.18μm, but using .35μm transistors which
are in the design kit for analog design...

wat input noise can be achieved with the above parameters to improve the offset noise which spec can be reduced r increased???

am new to this filed plzz explain in detail how to acieve the above specs which is the best topology r any further improvements in values can be made

Added after 4 hours 57 minutes:

which is the best topology n how can we achieve them
 

    V

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top