CMOS transistor param

po2act

Hi to all,

Can any one of u explain to me the following transsitors parametrs:


XM0 Z B A Z EP3V3GP_BS3JU w=2.5e-6 l=0.4e-6 nfing=1 ncrsd=1 number=1
+srcefirst=1 ngcon=1 mismatch=1 po2act=-1 lpe=0


THX

ngcon layout

gafsos said:

Hi to all,

Can any one of u explain to me the following transsitors parametrs:


XM0 Z B A Z EP3V3GP_BS3JU w=2.5e-6 l=0.4e-6 nfing=1 ncrsd=1 number=1
+srcefirst=1 ngcon=1 mismatch=1 po2act=-1 lpe=0


THX

Click to expand...

W=2.5 µm
L=0.4 µm
Fingers = 1 ( it will be one device, quite long I must say, but depends on the technology you are using)
I don't now the rest
D.

cmos transistor

What kind of simulator do you have? This MOSFET declaration looks exotic... ;-)
a.

srcefirst

ELDO is my simulator

Any suggestions ???

A+

XM0 Z B A Z EP3V3GP_BS3JU w=2.5e-6 l=0.4e-6 nfing=1 ncrsd=1 number=1
+srcefirst=1 ngcon=1 mismatch=1 po2act=-1 lpe=0

if nfig is the number of fingers, then ngcon is the number of the gate connections. Mismatch should apply for cross quad or centroid topology.

Anyhow, why don't you change the paameters one by one and see what happens in layout? I am sure these parametes are refered in layout of the device!

D.

Added after 1 hours 8 minutes:

Here is something more:

I found in ASSURA that m is multiplicity of the device. I therefore assume that mismatch=1 means one device, otherwise if you change it to 2 you will have two equal layout devices etc.

ngcon is the number of the gate connections, for this I am positive now.

Maybe later I will have something more...

D.

gafsos

you should have a look at your foundry Design Rule Manual to get a correct response about it.

I see that some parameters are customized one.

Your MOST has a BSIM3 model. I suggest to read some book on BSIM models, also available in internet.

I hope it can help.
Mazz