What's the function of Sigma-Delta mod. in PLL?

Hi,

What is the exact role that a "∑-Δ modulator" play in a fractional-N PLL??

Can someone explain it simply??

What is the "∑-Δ modulator" even?

Thnx,

-- Knack

To lower the Phase-noise of the PLL !. Noise is spreadout over a wider frequency range.

Paul.

PaulHolland said:

To lower the Phase-noise of the PLL !. Noise is spreadout over a wider frequency range.

Paul.

Click to expand...

Can you explain little more? How can this take place ?

Thnx,
-- Knack

OK. Do you know the PLL that uses a XOR as phase compare function ?. OK. you then also know that the frequency that is coming out of this XOR is your reference frequency let say 1Mhz, then you also have 1 MHz frequency steps !. OK ?. Now your PLL filter needs to filter this frequency otherwise you will have next to your carrier left and right at 1 MHz offset a signal.

The problem with this type of PLL is that your loop bandthwith and your reference frequency are always liked. Large loop bandwith is nice since you can lock fast and suppress the inband noise of your PLL but your stepsize is always large since your loop bandwith is large. That is why they designed fractional N (to take a frequency step wich is a fraction of your reference frequency). This PLL works nice but has many surious signals we do not want making your loop filter complex and still not perfect. If we take the fractional N and increase the frequency but leave the duty cycle in tact you get a working PLL but your spurious signals are transformed to a higher frequency and thus more easy to filter...

PaulHolland said:

OK. Do you know the PLL that uses a XOR as phase compare function ?. OK. you then also know that the frequency that is coming out of this XOR is your reference frequency let say 1Mhz, then you also have 1 MHz frequency steps !. OK ?. Now your PLL filter needs to filter this frequency otherwise you will have next to your carrier left and right at 1 MHz offset a signal.

The problem with this type of PLL is that your loop bandthwith and your reference frequency are always liked. Large loop bandwith is nice since you can lock fast and suppress the inband noise of your PLL but your stepsize is always large since your loop bandwith is large. That is why they designed fractional N (to take a frequency step wich is a fraction of your reference frequency). This PLL works nice but has many surious signals we do not want making your loop filter complex and still not perfect. If we take the fractional N and increase the frequency but leave the duty cycle in tact you get a working PLL but your spurious signals are transformed to a higher frequency and thus more easy to filter...

Click to expand...

Hey Paul,

You are a real expert indeed in explaination

But, can you explain why will the filter be complex??

Moreover, you explained why they thinked to use factional-N, but didn't explain how?? How can a sigma-delta be involved in that?

Thanks for beeing patient

Cheers,
--Knack

Hi Analog has some very nice papers about Sigma-Delta PLL's. Most modern PLL chips today are Fractional N or Sigma-Delta PLL's ont some commercial TV tuners (analog signal) are still using integer N for cost reasons.