knack
Member level 2
Hi there!
Is it alway could stated that Counter = Divider and Divider = Counter??
I specially mean in PLL way back from VCO... the "÷N" block, is it counter or divider??
It should be multimodulus right?? for an application like a freq. Synthesizer!
Well, practically speaking, how can a counter or a divider be changed??
I assume that they'll change it using "clear" and "reset" etc. signals, but this will have different delays for divided signals...
Anybody understanding "how a multimodulus divider work" can explain it to me??
Cheers,
-- Knack
Is it alway could stated that Counter = Divider and Divider = Counter??
I specially mean in PLL way back from VCO... the "÷N" block, is it counter or divider??
It should be multimodulus right?? for an application like a freq. Synthesizer!
Well, practically speaking, how can a counter or a divider be changed??
I assume that they'll change it using "clear" and "reset" etc. signals, but this will have different delays for divided signals...
Anybody understanding "how a multimodulus divider work" can explain it to me??
Cheers,
-- Knack