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simulationg the effect of the pads

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drabos

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I have to a design a circuit which make 1 nm width 5 A current pulses to a laser diode. I have to simulate the bonding wires and the pads effect, as well.
How can I simulate the effect of the pad?

I use 0.35 um BiCMOS AMS process, in this process which pad and ESD protection should I use.

Thanks,
 

bonding wire usually modeled as an inductor of value about 1-2 nH, and this model varies according to the technology used and the manufacturer, about the package model , it varies according to the type of package you intend to use; i.e. flip chip package, quad package, ...etc, once you know the type of the package, you can search the net for its model to put it in your simulations,
 

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    drabos

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You have to be careful with the current density of the bonding wires. For 5 A you will need several bonding wires.
 

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    drabos

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The PAD usually can be modeled as a capacitor with a resitor in series. Since you have a large current about 5A, the leakage current introduced by the PAD and ESD can be neglected. There are many ESD protection alternatives, such as diodes, BJTs, ggNMOS, SCRs and so on. which one to chose depends on your requirement and conditions, such as ESD level, your supply voltage and so on.
 

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    drabos

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a simple experience rule for bond wire is 0.8~1nh every mm, and ~1pf capacitive loading for every 3mm and 40mohm resistance for every 3mm bond wire length, model it as a simple RLC is accurate enough for you.
 

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    drabos

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what about the mutual inductance between the bonding wires?
 

package model can be make of inductance ,apacitor and resistor.the value difference with difference packge way.
 

There won't be any package, die assembly.
 

mdcui said:
a simple experience rule for bond wire is 0.8~1nh every mm, and ~1pf capacitive loading for every 3mm and 40mohm resistance for every 3mm bond wire length, model it as a simple RLC is accurate enough for you.
Click to expand...

Models as serial RLC?
I think the capacitor should be the couple cap between bonding wire and gnd or vdd.
 

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