katrin
Full Member level 1
When I use worst cases simulation(may also called corner simulation), for example, worst power model, worst speed model, worst one model ,etc....provided by the design kit for my CMOS circuits, I find there are significant differences in the simulation results compared to the typical mean model. and I have no idea why does it happan and how can I optimize the circut to make it not sensitve to worst cases models.
however, does the simulation result from the worst cases realistic, or it is just too pessimistic? how can I make the circuit more robust?
however, does the simulation result from the worst cases realistic, or it is just too pessimistic? how can I make the circuit more robust?