Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Latch Based Design.......STA

Status
Not open for further replies.

Guru59

Full Member level 4
Full Member level 4
Joined
Jul 10, 2006
Messages
217
Helped
7
Reputation
14
Reaction score
3
Trophy points
1,298
Activity points
2,812
Hi.......

Everyone agrees to avoid unnecessary Latch in Design..........

How to avoid such LATCHES......?

any papers on such or ant SNUG material would be appreciated.........

Thanks
 

Some Good MAterial in this link......

all the best...........
 

    Guru59

    Points: 2
    Helpful Answer Positive Rating
Thanks Buddy.....

but i need to know the latch based Design.....

if you have any material on such..........plz

upload to ::: haridasom@gmail.com
 

ok....so there is a very gud book called hdl chip design by douglas smith.....this one has a chp. on latches and register.....gud one...ust read...it has given coding sytles for bith verilog and vhdl.....
 

Thanks caplash.....

but i need to know the latch based Design.....

not the coding for it........i need some material or PDFs on LATCH affecting STA...

thanks
 

Hi Guru

Refer to the following EDA Board Topic



Hope it helps you
 

SUN
Asynchrouns Circuit - Micropipeline

**broken link removed**
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top