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Hi
if your purpose of V is Vds,
you can connect bulk and source terminals together, then connect a voltage source (e.g. by VDD volts) to drain terminal, also set gate-source junction to a bias voltage (e.g. S to VDD and G to VBias) this determines notig your required ID in deep saturation region (by square-law function);
Now run DC Sweep analysis for the voltage source (connected to drain) e.g. from 0 to VDD and view drain current of PMOS (as function of sweeped voltage, Vds) in Probe!
hope to be useful, if you want click on "help me" button, it doesn't cost you!
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