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A doubt on DDR SDRAM latency..................

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Guru59

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hi everyone............

the doubt is......

what does the number '5' in CL5 refers to........

it is given as cycle request latency......but what does it infer to.............


thanks
 

hi ,
the cl=5 means the required cycle number that the first bit data come out after u issued read comand.
 

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    Guru59

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Latency means the number of clock cycles required to get the output after the input is given. CL5 means the first output will be available 5 clock pulses after the first read command is given.
bye.
 

CL means the no of clock cycles it requires to appear the required data at output when the read signal is given
 

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