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with Spartan 3 is possible to receive SD-SDI video data (at 270 Mb/s) ; the only think is if you want to correct the jitter you mus put an external VCO to make the best clock recovery.
For the HD-SDI at 1,485 Gb/s you must use a Virtex serie FPGA because you need to use the block Rocket I/O.
The Xilinx have in the web site for each application free reference design with the source code; I tried It and work perfectly; for the HD-SDI I think that the best solution for You is to use the Xilinx VIODC development board in order to develop the application.
Regard
if for decoder you mean a deserialize (o serialize) chip you can use a gennum chip (for example: hxxp://www.gennum.com/video/products/gs1560a_gs1561.htm hxxp://www.gennum.com/video/products/gs1532.htm ) or a a national semiconductor chip (national.com); if you need to convert it in analog signal you can use an analog devices IC (you can see how xilinx do in the viodc board and copy it).
However, if you use the little size Virtex 2 pro with rocket I/O this is less expensive respect to gennum or national semiconductors dedicated chip.
Regards
yes it is possible. But I think you need to reprogram your FPGA since PLL on on Spartan III is not reconfigurable on flight. Basicaly here what you looking at
Hsync total length
Hsync offset
Hsync length of the pulse
Vsync totla length
Vsync offset
Vsync length of the pulse
DE Hsync start, length
DE Vsync start, length of the pulse
And offcourse variable clock for different resolutions
I have tried connecting the host computer with an extended monitor.
The custom timings are not working for this monitor, I have used scoped to check the output signal from DVI , it seems the host computer does not accept the custom timings.
I have used power strip to overwrite the timing setting of graphic setting.
It still does not work.
Maybe the graphic card does not support custom timings.
But my VHDL code can work properlly for all standard timings.
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