More questions about protel DXP 2004

While my previous question has remained unanswered in a few threads below, I take my chance and ask a few more questions about protel DXP 2004.
1- Some nets have to connect to SMD components as well as other components. I normally would like that such nets to have a clearance of at least 20mil but because SMD pins are closer than this If I set clearance to 20mil the net won't be routed, any solution?
2- I usually have many grounds (both digital and analog) in my boards that I like to be connected to their corresponding ground pin (digital or analog) at board power entry by a star configuration not a daisy chain configuration. The method that I use is to place some dummy resistors near ground entry of board and then I shorten those dummy resistors at assembly time, any better solution?
3- I used auto placer many times and every time I regretted waste of my time and then started to place manually, is auto placer has any use?
Thank you

1. Place a 'room' around the components you want to have smaller clearances, and define a rule for 'touches room'.

2. You are doing it the best way for an autorouter. There is no other way for an autorouter to figure out a 'star' configuration to a plane.

3. No auto placement in any EDA package is as good as a human when placing components. I don't know of any professional that routinely uses an auto-placer.

Thank you for your responses to my recent questions and also to my previous question about guarding, you helped me a lot. You know, I'm very lazy and when you said in your number two response.

You are doing it the best way for an autorouter

Click to expand...

It made me curious that is it only me the lazy who is so dependent to autorouter or other engineers also trust the autotouter and pray altium engineers know what they are doing. My boards usually have about 500 nets and many thousands tracks and usually I can't even check every single net visually and my whole career depends on DRC check.
Let me ask you another question regarding Hardware
does adding 1GB ram i.e. increasing ram from 1GB to 2GB has any significant effect on speed of autorouter?
what about graphic card memory ?
and what about CPU catch(i.e. increasing from 2MB to 4MB) DuoCore 2GHz
I wish best for you, thanks

Generally, increasing system RAM improves performance of DXP in every respect. I noticed an overall speed increase when going from 1Gb to 2Gb.

Increasing graphic card memory improves screen redrawing. That will not affect autorouting, but will improve any manual operations you may do in the PCB editor. Zooming and panning are affected by graphic card memory.

CPU cache won't make much difference unless your bios and motherboard chipset can take advantage of increased cache memory. Usually, the motherboard is optimized for specific CPU's. You should match the CPU to the board manufacturer's recommendations.

The speed and efficiency of a dual core CPU depends heavily on the motherboard and the operating system.

You will find that most board designers who work on layout of critical circuits do a great deal of manual routing to ensure the best signal integrity. Autorouting is used only for non-critical circuits where speed of layout completion is more important than signal integrity. No autorouter can do a board layout better than a human brain.

More questions about P*otel DXP 2004

Agreed, experienced designer always route manually in such situation.
Of course, if you can afford it then go for Mentor Boardstation, Zuken CR5000 or CADStar Diamond HS which has the capability that you desire.
For the PC, boy! Go for the Core 2 Duo with as much DDR2 RAM as you can...it really zips...


Protel User

More questions about P*otel DXP 2004

One of the most time-consuming parts of PCB design for me is to assign return paths for each signal, especially HF signals. Though most signals have to return to some grounds, so having a ground layer can solve this problem easily but there are many times that I can't use a ground layer(either because signal have to return via paths other than ground layer or because I have to use two layer boards for lowering cost). The challenge is return path have to be routed alongside the signal path and as close as possible to it to lower loop area. I usually have to do this by hand. It wouldn't be a big problem if I had to route a few such signals but I have to do this for many of them, so I'm looking for some kind of automation. I only know protel and orcad and as far as I know neither of them can do this. Are there other softwares capable of doing such thing?
Thank you

Stop and think about it for a minute - how would an autorouter know that a ground is to be routed next to a signal trace? Ground is a single common net.

The closest you might come is to define your critical signals as differential trace pairs with the ground return having a differential pair net name instead of ground. The schematic would then have to use a net tie to connect the "ground" side of the pair to the ground net. You would also need to write a design rule for net impedance. Any signal trace routed in proximity to a ground return line needs to have its width and spacing controlled to control the trace impedance - just like controlling dielectric thickness and trace width relative to a plane.

No EDA package can autoroute such a convoluted requirement without some pretty involved routing rules, and a 'jiggered up' schematic. It's faster and cleaner to just manually route.

Face it Fala - you're going to have to do some manual work. Software can't do all the work for you. Autorouters are poor substitutes for an educated human designer.

More questions about P*otel DXP 2004

Well, I usullay think the boards that I have to route are much bigger and complex than most of my collegues. I'm talking about a 2 layer 30Cm x 25Cm board with more than 500 nets and about 9000 tracks(if you count polygon tracks it will be nearly 100000 tracks), about 2000 pads about 500 vias(after running via minimization algorithm), nearly 40 different polygons. seriously it is immposible to do all the work manually. I'm curious how many working hours and how how many days(or weeks) would you spend for such a board?

It took me 2 weeks to manually route a 30x30cm board with 1113 arcs, 1097 fills, 5193 pads, 2662 text strings, 21158 tracks, 505 vias, and 13 polygons. When I was done, there were no vias on any of the critical signal paths - all of them were continuous on a single layer.

Layout engineers don't count separately the tracks that make up polygons or fills.

More questions about P*otel DXP 2004

So, roughly speaking such a board should pay for about half of your monthly salary. I wonder how much do you charge your customer for such a board?

I am a graduate engineer. I do more than layout boards. I'm paid for ENGINEERING the board, not simply laying it out. I receive a salary comensurate with the knowledge I bring to the job.

Layout is simply artwork - I enjoy the creativity of the art. Engineering pays the bills.