Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Conformal compare retiming netlist and RTL

Status
Not open for further replies.
D

davyzhu

Advanced Member level 1
Advanced Member level 1
Joined
May 23, 2004
Messages
494
Helped
5
Reputation
10
Reaction score
2
Trophy points
1,298
Location
oriental
Visit site
Activity points
4,436
pipeline retiming

Hi all,

I use conformal to compare logic with netlist and RTL. But some logic is synthesized by retiming. Can I set some constraints to compare retiming netlist and RTL? And is set Black-box means just compare the input and output logic of the Black-box?

Best regards,
Davy
 

conformal pipeline

can u please share hier do file or do fle u used
then i can u what u missed
 

    D

    davyzhu

    Points: 2
    Helpful Answer Positive Rating
pipeline, retiming

Use command read_design -analyze retming command
 

    D

    davyzhu

    Points: 2
    Helpful Answer Positive Rating
how to handel register merging in conformal lec

Here's the answer from my training materials.
Although I've not got time to go through it : )

For simple pipeline retiming circuit,
1. pipeline retimed module must be root module
2. can use "add module attribute <module> -pipeline_retime [-dff2buffer] [-golden|-revised]"

For advanced pipeline retiming,
you need Conformal Ultra license.

read library
read design
.....
add module attribute xxxx -pipeline_retime
set system mode lec
analyze datapath -merge
add compare point -all
compare
 
  • Like
Reactions: irun2

    D

    davyzhu

    Points: 2
    Helpful Answer Positive Rating
    I

    irun2

    Points: 2
    Helpful Answer Positive Rating
lec read_design

Hi wangkl,

Thanks for the help!

You said "
For simple pipeline retiming circuit,
1. pipeline retimed module must be root module
..."

Is root module "top module"? And why " pipeline retimed module must be root module "?

Thanks!

Best regards,
Davy
 

netlist to rtl

oh, I dont think root module means top module.
Root module should be current target module to be compared.
The current module could be the top design or a sub-moudle inside.
There's a command "set root module xxx " in LEC.
For it's a simple retimed without Ultra license,
I guess, the tool could not handle the retiming comparation through design hierarchy boundary.
 

    D

    davyzhu

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top