cowslip
Junior Member level 1
slave serial mode
Hi everyone,
I wonder what is the difference in result when using boundary-scan or slave serial configuration mode in programming a Xillinx FPGA.
Does anyone knows what "daisy-chain configurations" mean in slave serial mode?
I realize that in boundary-scan configuration mode, the TCK(test clock) is used, while in slave-serial mode cclk is used.
Thanks in advance. :roll:
Hi everyone,
I wonder what is the difference in result when using boundary-scan or slave serial configuration mode in programming a Xillinx FPGA.
Does anyone knows what "daisy-chain configurations" mean in slave serial mode?
I realize that in boundary-scan configuration mode, the TCK(test clock) is used, while in slave-serial mode cclk is used.
Thanks in advance. :roll: