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CLOCK AND DATA RECOVERY?

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ithink

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clock and data recovery book

hi,everyone
i am suffering great difficulty in my research about CDR design,i have read some papers, such as ''a 10gb/s cmos cdr circuit with an analog phase interpolater'' ,and so on, and made a lot of effort to learning cdr principle.but i have no progress in design cdr, now i want to build math model with phase interpolater in matlab,i find it is very difficult. maybe you offer some advice or paper to me !
thanks
 

how to build cdr model in matlab

Since you are modeling the circuit and not designing it... You could start with some simple circuit with the CDR like a phase detector or phase frequency detector. All you would need is a basic understanding of how these work and you can start off you modeling and add nonlinearities as you go along...

This book is a great starting place:
Monolithic Phase-Locked Loops and Clock Recovery Circuits : Theory and Design by Behzad Razavi
 

simulink phase shift

thank you, analogartist

the final aim is to design cdr circuit satisfied our require, i just start from math model, and step by step to circuit design.
now i don't understand phase interpolater in cdr system, i have been designed pll circuit sucessfully,but cdr differs with pll.
 
books on clock and data recovery modeling

u will find a great notes in both math model and method of design and also circuit in this book

Design of integrated circuit for optical communications
Behzad Razavi
 
matlab cdr model

I have two other lectures that look like the above one and may also be helpfull :
 
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matlab simulink clock and data recovery

check
**broken link removed**

lect 21 : about MSK , and CDR
khouly
 
matlab model clock recovery

any guy can upload a demo CDR model in matlab simulink?
 

modelling clock and data recovery matlab

Have any dual-path Loop architecture model?
 

matlab programming + clock and data recovery

Razavi's book is a good resource.

I always feel it would be interesting to use sampling data model, i.e. Z transform to describe CDR. It's very useful if you consider the statistic nature of transition density --- you won't be short of equations soon.

A great benefit of using sampling model is : it can model the VCO transfer function accurately(not just a DC value, Kvco). For low Q ring oscillator, it won't make much difference. But for LC oscillator, you will see high freq small disturbance from phase detector might cause high freq large phase shift. It's specially true if high speed binary CDR (bangband type) is under study.

A Ph.D. thesis? Maybe.
 

clock and data recovery modeling

Hi, how many ways we can use in CDR?
Can we recover clock from data with knowing its aux clk?
 

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