Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi!!!
The power ring is routed around digital chip, black box.
Stripes - vertical and horizontal continuation of power ring for improvement of
current flow.
Power pad could be also an exposed pad, usually used for heatsink removal.
It's connected to ground and must be well designed with a lot of vias connecting GND planes on every layer involved in design.
Hi, i' ve been working with power planning in the past months. There is a good tutorial for power planning that explains what you need at **broken link removed** (it is for Cadence Encounter but has screenshot's of rings, stripes, etc..) I hope it will help.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.