agilandeswari
Junior Member level 1
rampe vhdl
hi all
iam new to VHDL and FPGA.
someone plz tell me how to write a program for frequency divider in VHDL.From 100kHz ,i have to reduce to 50Hz.should i write a test bench for it.
also plz tell me how to generate Ramp pulses using VHDL code.
Iam badly in need of these two programs for my seven pulse generator program to run a motor.
If anyone have all these or any of these ,plz upload.
thank you in advance
agila
hi all
iam new to VHDL and FPGA.
someone plz tell me how to write a program for frequency divider in VHDL.From 100kHz ,i have to reduce to 50Hz.should i write a test bench for it.
also plz tell me how to generate Ramp pulses using VHDL code.
Iam badly in need of these two programs for my seven pulse generator program to run a motor.
If anyone have all these or any of these ,plz upload.
thank you in advance
agila