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ESD device put between the pads

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chang830

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Hi,
I am doing the layout integration in my project. The design is based on the previous silicon verified one. The previous design put the ESD device between the PAD and core circuit, the ESD divice use the convetional CMOS diode clamp.It consum large area. So I intend to put the ESD divice between the pads to reduce the area. What I want to know if any risks and considerations in doing it?

Thanks
 

As long as when the ESD event happened, you can make sure the shortest path to discharge is going through the diode clamp, then it should be fine.
 

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    chang830

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The previous silicon verified one is more safe.
 

newcpu said:
The previous silicon verified one is more safe.
Click to expand...

hi, newcpu,
you mean putting the ESD between the core circuit and pad is more safe than that betwwen the pads? Would you elaberate it a bit more?

Thanks
 

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