Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Design rules for tsmc 65nm and 90nm processes

Status
Not open for further replies.

deh_fuhrer

Full Member level 5
Full Member level 5
Joined
Jul 25, 2006
Messages
276
Helped
46
Reputation
92
Reaction score
18
Trophy points
1,298
Activity points
2,862
Hello guys,
can anyone please give me the complete list of design rules for tsmc 65nm and 90nm processes.i am using a layout tool in which dr can be edited so i want to make a btech project using these rules.please help me out.
Thanks in advance,
Bye
 

TSMC 90nm

If you use tsmc 90nm to tapeout, you can ask the foudry for the document.
 

    deh_fuhrer

    Points: 2
    Helpful Answer Positive Rating
Re: TSMC 90nm

i am using the cadence generic process design kit, and i think it's adequate for layout and simulations. they have the 90nm PDK as well as the 180nm one.

As for TSMC, i am not too sure how you can request them.
 

    deh_fuhrer

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top