Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Operator reduction(verilog)

Status
Not open for further replies.

choonlle

Full Member level 2
Full Member level 2
Joined
Jul 18, 2006
Messages
126
Helped
20
Reputation
40
Reaction score
1
Trophy points
1,298
Location
AFRICA
Activity points
2,025
how to use reduction and, reduction nand, reduction , or ...so on.?
what the different compare to bit-wise and, or ??


Help!


Thanks

Regards,
choonlle
 

Reduction operator is to perform the logical operation for a vector

For example if A= 4'b 1010 then reduction AND will perform Bit wise logical AND on A and will give a single bit output

In our case the output will be 1'b0


Bitwise operators are used to perform Bitwise logical operations of different vectors

For Example A= 4'b1010 B= 4'b0101

A&B will result in 4'b0000(i.e 1&0 0&1 1&0 0&1)

These operators might look the same but will perform different operations depending on how we use them


Hope this is useful
 

    choonlle

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top