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How gate count is calculated

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amara

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dc nand equivalent gate count

I have a doubt regaring gate count. How we will calculate gate count?
 

dc shell gate count

Try this script in DC -Shell this will give gate count

set sh_new_variable_message false
set cell_list [get_cells * -hier -filter "is_hierarchical == false"]
set ref_cell_list ""
set cell_cntr_list ""
foreach_in_collection cells $cell_list {
set cell_ref_name [get_attribute $cells ref_name]
if { [lsearch $ref_cell_list [list $cell_ref_name]] == "-1"} {
lappend ref_cell_list [list $cell_ref_name]
set ${cell_ref_name}_count 1
lappend cell_cntr_list ${cell_ref_name}_count

} else {
set ${cell_ref_name}_count [incr ${cell_ref_name}_count ]

}
}
set cell_cntr_list [lsort -dictionary $cell_cntr_list]
foreach i $cell_cntr_list {
printvar $i
}

echo "Total number of leaf cells: [sizeof_collection $cell_list]"
echo "Total number of references: [llength $cell_cntr_list]"
set sh_new_variable_message true
Click to expand...
 

Hi spauls,

Thanks for ur reply

Added after 1 minutes:

I have fruther doubt that in genral gate count is in terms of NAND gates or any other?
 

Hi amara,

Gate count is expressed in terms of equivalent nand gates.

Gate count is the ratio of sum of area of all gates in the design to nand gate area.

Nand gate area is optimized area for particular technology node.


Regards
Mahanthesh
 

Hi amara

this script will give you the gae count of all the cells used in Netlist.
 
gate count is usually mentioned on NAND2X1 equivalent gates.

you have to divide the total gate count by one NAND2X1 area.

rgds
k_vlsi
 

It depends on the basic cell used for building the library.
It can be 2input Inverter or two input Nand gate.
Total area given by ur dc-synthesis divided by the area of above cell
gives u gate count.
Depending on technology lib area of basic cell changes.
Refer the lib u are using and find the basic cell.
 

Total area of design
Gate Count = ------------------------
Area of NAND2X1
 

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