Using multiplication factor 100 in current mirrors

hello

can i use multiplication factor 100 in current mirrors???i dont care much for accurate matching,,,,what error expected in this case,,,????

regards

Re: mirroring current

yes, you can use a factor of 100 between two transistors to multiply the current in a mirror.

Re: mirroring current

demodb said:

yes, you can use a factor of 100 between two transistors to multiply the current in a mirror.

Click to expand...

do you know how much error will be in layout than in schematic??

Re: mirroring current

are you talking about mismatch here, because i know this is dependant on the width of the transistors. So making them wider will decrease mismatch.

Re: mirroring current

demodb said:

are you talking about mismatch here, because i know this is dependant on the width of the transistors. So making them wider will decrease mismatch.

Click to expand...

i mean error in ratio of current between them

Re: mirroring current

since ur multipilcation factor is large i.e 100. this will result in
1)larger area
2) source to drain parasitic capacitence and gate resistence

so for better matching and reduction in s/d cap u need to spitt the tranistor .even spitting is preferred,this will reduces ur area , s/d capacitences and will optimize gate resistence.

w/l=32/1 then spilt by 16/2 +16/2 then further 8/2 + 8/2 + 8/2 + 8/2 so on.

As the junction capacitences is reduced the speed of tranistor will increase

Re: mirroring current

gharuda said:

w/l=32/1 then spilt by 16/2 +16/2 then further 8/2 + 8/2 + 8/2 + 8/2 so on.

Click to expand...

do you mean 4 parallel transistors with w=8 L=2
i think it results W=8*4
L=L/4=2/4=0.5
thanks

Re: mirroring current

Be very careful of noise if you are multiplying current up by a factor of 100x. The noise of the diode connected single device will be large in proportion to it's current level. This noise will be multiplied by a factor of 100x.

Example:
Multiplying a current of 1uA to 100uA.
Transconductance of Q1 (single device) is set to 3.7uMhos.
Transconductance of Q2 (100x device) is 270uMhos.

Noise in Q2 is 2pA/rtHz. Over a 100MHz band, this would be 0.02uARMS.
Noise in Q1 is 0.2pA/rtHz, which seems smaller, but it will be multiplied by the 100x ratio of currents, making an output noise of 20pA/rtHz. Over a 100MHz band this is 0.2uARMS.

Re: mirroring current

gharuda said:

since ur multipilcation factor is large i.e 100. this will result in
1)larger area
2) source to drain parasitic capacitence and gate resistence

so for better matching and reduction in s/d cap u need to spitt the tranistor .even spitting is preferred,this will reduces ur area , s/d capacitences and will optimize gate resistence.

w/l=32/1 then spilt by 16/2 +16/2 then further 8/2 + 8/2 + 8/2 + 8/2 so on.

As the junction capacitences is reduced the speed of tranistor will increase

Click to expand...

speed not an issue in the tail current sources as all what required from them is a dc current,,,,,,

Added after 2 minutes:

JPR said:

Be very careful of noise if you are multiplying current up by a factor of 100x. The noise of the diode connected single device will be large in proportion to it's current level. This noise will be multiplied by a factor of 100x.

Example:
Multiplying a current of 1uA to 100uA.
Transconductance of Q1 (single device) is set to 3.7uMhos.
Transconductance of Q2 (100x device) is 270uMhos.

Noise in Q2 is 2pA/rtHz. Over a 100MHz band, this would be 0.02uARMS.
Noise in Q1 is 0.2pA/rtHz, which seems smaller, but it will be multiplied by the 100x ratio of currents, making an output noise of 20pA/rtHz. Over a 100MHz band this is 0.2uARMS.

Click to expand...

thnaks ,,your analysis seems logic,,but i dont care much about that, or my question target is approximate percentage of error between schematic level current and layout level current

thanks

Re: mirroring current

JPR said:

Be very careful of noise if you are multiplying current up by a factor of 100x. The noise of the diode connected single device will be large in proportion to it's current level. This noise will be multiplied by a factor of 100x.

Example:
Multiplying a current of 1uA to 100uA.
Transconductance of Q1 (single device) is set to 3.7uMhos.
Transconductance of Q2 (100x device) is 270uMhos.

Noise in Q2 is 2pA/rtHz. Over a 100MHz band, this would be 0.02uARMS.
Noise in Q1 is 0.2pA/rtHz, which seems smaller, but it will be multiplied by the 100x ratio of currents, making an output noise of 20pA/rtHz. Over a 100MHz band this is 0.2uARMS.

Click to expand...

Hi,

it's not clear to me how did you arrive at above noise values for Q1 and Q2. Can you please elaborate?

Re: mirroring current

JPR said:

Be very careful of noise if you are multiplying current up by a factor of 100x. The noise of the diode connected single device will be large in proportion to it's current level. This noise will be multiplied by a factor of 100x.

Example:
Multiplying a current of 1uA to 100uA.
Transconductance of Q1 (single device) is set to 3.7uMhos.
Transconductance of Q2 (100x device) is 270uMhos.

Noise in Q2 is 2pA/rtHz. Over a 100MHz band, this would be 0.02uARMS.
Noise in Q1 is 0.2pA/rtHz, which seems smaller, but it will be multiplied by the 100x ratio of currents, making an output noise of 20pA/rtHz. Over a 100MHz band this is 0.2uARMS.

Click to expand...

it is very important issue
but what is the solution if i want large current from small current refrance
thanx JPR

Re: mirroring current

With your questions, I noticed a discrepancy in my original post: The transconductance of Q2 should be 370uMhos.

The transconductances that I presented were not really calculated from any real transistor sizes or process, just a guess for a starting point.

The noise current in a MOSFET is sqrt((8/3)*K*T*Gm), in amps/sqrt(frequency). Simply plug in the transconductance, and you have the noise current.

Again, for bandwidth, I simply made a guess. I don't know where the current is being used, and without that, I can not specify a bandwidth. Simply multiply the noise current by the sqrt of the noise-bandwidth to obtain noise level.

How can this be improved? My first inclination would be to not use such a small current to generate your larger currrent, if possible.

Depending upon the application noise bandwidth, you may be able to filter at the gates of your current mirror to reduce the high frequency thermal noise. Keep in mind that low frequency thermal and flicker noise will still be multiplied.

Another way to reduce the noise is to reduce the transconductances in the current mirror. If the W/L ratio for the transistors is decreased, the transconductances will decrease. If the width is reduced by 2x and the length increased by 2x, the transconductance will reduce by 4x and the noise level will decrease by 2x. Of course, there are limits to this, as the Vgs voltage will increase, and the minimum Vds voltage for the current mirror will increase.

Re: mirroring current

General speaking the multiplication factor of current mirror is below 20.