What to consider when breaking transistor into fingers?

hi,
i need to know what are the basics that should be considered when breaking a transistor into multiple of fingers.
i think one couldn't leave the transistor as one finger especially if its width is quite large. also, if the transistor width is large, one can't make the fingers have the minimum allowed dimension. so, any help?

transistor finger

if you are talking about mosfet, breaking up into smaller fingers reduce the device parasitics.

you have to know whether it is a device that needs matching (eg current mirror) or do not. if it does, the finger got to be the same width. interdigitalize the fingers also help to improve the matching of the transistor.

finger transistor

i mean even for no matched transistors, cause generally as i increase the number of fingers, parasitics decrease, but Vth increases.
another thing, i know that the layout needs my transistors to be fingered, but the question is, to what extent should i make my transistors' dimensions? is it conventional to make it such that it should have a square layout for example?

thanks

transistors fingers

shadoweek said:

i mean even for no matched transistors, cause generally as i increase the number of fingers, parasitics decrease, but Vth increases.
another thing, i know that the layout needs my transistors to be fingered, but the question is, to what extent should i make my transistors' dimensions? is it conventional to make it such that it should have a square layout for example?

thanks

Click to expand...

not sure whether this will answer your question.

when drawing layout, you need to communicate with your ic designer. if you are the one who design it, you should know how much variation you want. so you know how much a extend you allow your vth, parasitic to affects your circuit.

also, by doing floor planning first, you should able to guess whether it should be a square or rectanglar layout etc etc.

general rules is that you want to minimize your area to save cost and without affecting your circuit performance.

if you are talking about ADC, matching is very impt. so breaking into fingers and reducing the parasitic etc is very good. if you are drawing IO PAD, maybe fingers is not much a issues, instead for the circuit to be able to withstand ESD etc is more impt.

hope this help...

fingered transistor

breaking the fingers will lessen the parasitic because the resistance of the device is lessen. if u are designing high speed ckts, it is best to break the fingers in order to lessen the time delays caused by the parasitics...

finger transistor layout

If you are designing a power MOSFET for supporting large currents or ESD protection circuits, increasing the number of fingers help in proper distribution of current.

fingers + transistors

shadoweek said:

i mean even for no matched transistors, cause generally as i increase the number of fingers, parasitics decrease, but Vth increases.
another thing, i know that the layout needs my transistors to be fingered, but the question is, to what extent should i make my transistors' dimensions? is it conventional to make it such that it should have a square layout for example?

thanks

Click to expand...

VTH increases with the increase in number of fingers?? I haven't observed/heard any time. One thing that I observed from simulations is that when W/L of MOS decreases below 5 or 4, the decrease in current is more than proportionate for a given VGS-VT. But the reason I don't know. So I always follow it as a thumb rule that, "when ever a large transistor is fingered I make sure that W/L of each individual finger ≥ 5"

finger transistor

its a very starnge thing to say.,incresing device gate width (W) will increse the VTH..i do not think it is right. The only way VTH can varry if the process corner variontions occurs...