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What are the circuit techniques to improve LDO's PSRR in higher frequencies?

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jutek

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hello

could you tell me what are the circuit techniques to improve LDO's PSRR in higher frequencies (1MHz- more than 40dB).

regards
 

Re: LDO's PSRR

I think you should give more details of your circuits . The LDO'S PSRR may be dominated by the error amplifier. In general, the two- stage opamp has poor PSRR at high frequence,because of the miller compensation capacitor. So you can try the telescope & folded cascode structure.
 

Re: LDO's PSRR

Error Amplifier must to have wide bandwidth.
 

LDO's PSRR

device length is needed larger
 

Re: LDO's PSRR

jutek said:
hello

could you tell me what are the circuit techniques to improve LDO's PSRR in higher frequencies (1MHz- more than 40dB).

regards
Click to expand...
The LDO's PSRR is just the loop gain of your LDO.If only CMOS technology available, because there always exists a low pole at the output, So I think the way to do such a high GBW LDO, you must increase the low frequency gains.You can see papers of HUST of P.K mok's student. they use DFC(damping factor compensation) to compensate the circuit, so the overall gain of the LDO may be very high.DFC compensation is to control the complex poles damping factor, and then when is damping factor is large,it is easy to use zero to compensate the poles.With the use of complex poles, the GBW may be high.For more details,you can find the papers.
 
Re: LDO's PSRR

Hi allan_guo,

Did you implement a damping factor LDO and test it? I designed one, but it didn't work well.
And I think PSRR is not related to loop gain directly. Some LDO can have high PSRR and low loop gain.
 
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Re: LDO's PSRR

PSRR is a function of the loop gain (Aopenloop*Beta). So it can be maximized by increasing loop gain.
 

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