how to use fpga to implement dualport ram with sram ?

how to use fpga to implement dualport ram with sram ?

lzh08 said:

how to use fpga to implement dualport ram with sram ?

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Hi lzh08,

it should depend on the fpga chip you are going to use.
I once used virtex II pro, and sth like that i have used:
+ using unisim library from Xilinx
-- synthesis translate_off
library unisim;
use unisim.all;
-- synthesis translate_on
+ Depend on the size of RAM required, here i used RAMB16_S36_S36 (512 x 32 cells)

component RAMB16_S36_S36

port(
DOA : out std_logic_vector(31 downto 0);
DOB : out std_logic_vector(31 downto 0);
DOPA : out std_logic_vector(3 downto 0);
DOPB : out std_logic_vector(3 downto 0);
ADDRA : in std_logic_vector(8 downto 0);
ADDRB : in std_logic_vector(8 downto 0);
CLKA : in std_ulogic;
CLKB : in std_ulogic;
DIA : in std_logic_vector(31 downto 0);
DIB : in std_logic_vector(31 downto 0);
DIPA : in std_logic_vector(3 downto 0);
DIPB : in std_logic_vector(3 downto 0);
ENA : in std_ulogic;
ENB : in std_ulogic;
SSRA : in std_ulogic;
SSRB : in std_ulogic;
WEA : in std_ulogic;
WEB : in std_ulogic
);
and apply appropriate signals to it.
For more information, you should have a look at the user guide of the FPGA chip.
Hope that helps.

in ISE, u can find the template