Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
there are many method to model the power chip, please refer to Fundamental of Power electronics. State space average, average switch and other modeling methods are introduced.
In CCM, State space averaging is classic, and in DCM averaged switch model is better.
i think the results is determined by waht you want. for example, if you a system engineer you just want to get the very rude model comparing to the ic designer. for AE, you can use verilog AMS, top-down method. if ic, you can only use behavioral model. just depend on you.
Hill, the papers just talk about what is the freq reponse of open loop dcdc converter but do not show how to perform open loop freq response of current mode dcdc converter from the paper I read so far. Please introduce me the papers which teach how to perform open loop simualtion on a current mode dcdc converter for freq response.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
