Is ARM7 as reliable as any other family?

spurious handler arm7

I am migrating from 8051 to ARM7. I read about the Problem with spurious interrupt on ARM7. Is that an issue. There is so much confusing documents present on the web. I am using LPC2136 and want to know in simple words that
1. What is this problem.
2. Is it a cause of concern in terms of reliability
3. How can it be handled simply.

Hi,

as simple as I can describe it:
Migrating from a 8051 to an ARM7 will provide lots of opportunities and some challenges.
The Interrupt scheme provided by the original ARM7 has exactly two interrupt options, a so called IRQ = interrupt request and a so called FIQ = fast interrupt request. If you application is able to deal with just two levels of interrupts, you will not get into any issues at all. Keep in mind that your interrupt handlers are going to be a lot faster than they were for the 8051, so you can wait for one interrupt routine to finish instead of interrupting it again (called nested interrupts).
If you use nested interrupts please check the the application note on the Philips website:
**broken link removed**
"AN10381 Nesting of Interrupts in the LPC2000"

The interrupts on an ARM7 are is not a concern in terms of reliability as they have been used in many thousands of applications worldwide.

Simple handling is limiting nesting of interrupts and having a default handler installed like described in this AN
**broken link removed**
Title "Handling of spurious interrupts in the LPC2000"

One chapter:
"2.3 Handling of spurious interrupts
As mentioned above, the VIC would provide the value of the VIC Default Vector Address
register to the PC when a spurious interrupt occurs. During VIC initialization, along with
providing an ISR address to the VIC Vector Address Register, please program an
appropriate handler into the VIC Default Vector Address register for servicing a spurious
interrupt. In this handler, the following should be done:
1. Find the source of the interrupt (if there are multiple interrupt sources).
2. Clear the interrupt source (optional as shown in the UART case).
3. Update the VIC by writing to the VIC Vector Address Register.
Consider this routine as a regular IRQ ISR routine because the core will still be in IRQ
mode when the spurious interrupt is serviced. So please use the appropriate compiler
directives to classify this function as a IRQ interrupt handler."

Hope this helps, Robert

Thanks for the clarifications.

Can you please post some standard C code for the ISR that takes care of what you described. Assuming that I am not using nested interrupts.

Hi

Here is some C code for Arm LPC213x & 214x Basic driver

Hope its help

All the best

BObi