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How does the buffer reduce delay ?

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carrot

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Buffer

Hi,

I have heard many of them telling that "Buffer" reduces delay? But nobody says how? Can anyont tell this.
 

Re: Buffer

Buffers main job is to drive loads,for example if u want to drive a high capacitance from a normal inverter the rise and fall times will be long but if u used a buffer whose input capacitance is low and has high driving capabilities then u can drive the high capacitance with improved rise and fall times and hence improved delay
 

Buffer

You can read Rabaey's book
 

Buffer

Hi carrot,
The output impedance of buffer is low.
This means R*C time constant required to charge a capacitive load is less. Hence less delay.

There are conditions under which a buffer can reduce delay
1. Higher source resistance
2. In case of higher load capacitance series of buffers results in an optimal solution(this theorem will be proved in many VLSI books)

regards,
sudhir
 

Buffer

the delay is the RC delay.. which is much less than the propagation delay of the buffer itself... so it can reduce the RC delay...

sp
 

Re: Buffer

1) the higher the voltage, the faster the signal will be.

if we compare 2 circuit, one with 3v, one with 5v. The 5V signal will travel faster.

let's say, if ur circuit's voltage drop to 3v, then u include buffer (which is basically two inverter, the output of inverter is 5v). so u raise the voltage to 5V, thus speed up the signal, and reduce the delay.

2) if your circuit is already 5v, and u insert a buffer.

in this situation, inserting a buffer wont do any help in raising the voltage, bcz the source it self is 5v. instead, it will cause some propagation delay in ur circuit
 

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    carrot

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Buffer

the delay time depends on the drive strength and the load ,buffter strength the drive capbility,then short the rise and fall time !!! good luck!
 

Buffer

Rabaey's book is very good
 

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